yaxpeax-arm/src, branch 0.3.0yaxpeax arm decoderBump yaxpeax-arch and bitvec, allow use of deprecated yaxpeax-arch traits, fix bitvec syntax changes2024-06-25T21:09:39+00:00novafacingrowanbhart@gmail.com2024-06-24T20:00:04+00:00739317f268b4ed1a8f3e06af6c6fdf977219d4f9
Add support for `udf`2024-06-25T12:48:51+00:00Martin Finkmartin@finkmartin.com2024-06-25T12:45:12+00:00a9ce9a8365eb66507b9bcacb4236af77bd33c620
at least armv7t doesnt panic now, but im very uncertain these are right2024-03-17T18:27:48+00:00iximeowme@iximeow.net2024-03-17T18:27:48+00:00a29e738354b55c39d19b42838af2f091b2cc8973
ye olde "const array rebuilt in locals with simd but static is const" issue2024-03-17T09:22:32+00:00iximeowme@iximeow.net2024-03-17T09:22:32+00:00fe1662042b0bb6abfac96f1d582f1e5221a500d3
fix uxtb/uxth alias being incorrectly applied with x-size registers2024-03-17T08:56:24+00:00iximeowme@iximeow.net2024-03-17T08:56:24+00:00c3f1cd87d7d504841e0221309c53f4d009bf2b22
when decoding invalid opcodes, return errors. better testing for this circumstance.2024-03-17T06:25:49+00:00iximeowme@iximeow.net2024-03-17T06:25:49+00:002ea9ea69b3c6fe033c82df16b310acd6aa8a6728
be more explicit about undefined system instructions being invalid2024-03-17T02:44:57+00:00iximeowme@iximeow.net2024-03-17T02:44:57+00:00a91c1c50a39ff68a7e73cef70829e8a5b08b4b6b
system instruction and register improvements2024-03-17T02:34:27+00:00iximeowme@iximeow.net2024-03-17T02:34:27+00:0079d220ce177833f7dd80e15e1094bbfbf4c6f8b1
* cN instead of crN for control registers
* # for immediates in sys/sysl instructions
* write out ARM system register names in the way the ARM reference manual says
* cN instead of crN for control registers
* # for immediates in sys/sysl instructions
* write out ARM system register names in the way the ARM reference manual says
ldrab and ldraa tests, fix immediate decoding2024-03-16T23:35:23+00:00iximeowme@iximeow.net2024-03-16T23:35:23+00:002b0930355d87d7f195a7ff05d18b09b61a5ea490