yaxpeax-arm/test, branch 0.0.7yaxpeax arm decoderhttp://git.iximeow.net/yaxpeax-arm/atom?h=0.0.72020-12-06T23:54:52ZTODONE: adr with add/subtracted offset2020-12-06T23:54:52Ziximeowme@iximeow.net2020-12-06T23:54:48Zurn:sha1:635799ae37407621f791e6fe2aa3dba141c24763
instead of trying to shoehorn in `adr reg, label` syntax like the manual
requests, it's much easier to just describe these as `{add, sub} reg,
pc, offset` and potentially rewrite `pc, offset` as an `adr reg, label`
if a higher-level tool has that kind of information available.
warning cleanup (test edition)2020-12-06T23:39:28Ziximeowme@iximeow.net2020-12-06T23:39:06Zurn:sha1:fde906acd802e071c8a7f9435ea205692e4b26b4
add in some simd tests for future neon decoding. these tests are drawn
from capstone and may need some subsequent cleanup
add ldc/sdc instructions and a slew of 32b thumb2 tests2020-12-06T23:17:52Ziximeowme@iximeow.net2020-12-06T23:17:52Zurn:sha1:1572e928b41b5c0765d7f47b346110da14e58b9efix more incomplete cases, report arm instruction length properly2020-12-06T19:58:57Ziximeowme@iximeow.net2020-12-06T19:37:19Zurn:sha1:72109c2385c7b0940072f31fc3bcbeed68006060fix some 32-bit thumb2 instructions, hook up .w, `s`, and a few typos2020-12-06T19:58:57Ziximeowme@iximeow.net2020-12-06T00:42:17Zurn:sha1:e30fee133cd0296bf3d0211e5ce13b5dfba03561
mostly confusion of pre/post-increment, operand widths, immediate
widths, things of that nature
add thumb/thumb2 decoding2020-12-06T19:58:57Ziximeowme@iximeow.net2020-11-30T04:40:45Zurn:sha1:72f9a2500b2f2b65e61a5d19b3606225084c896d
16-bit instructions only, for now
armv7 support through neon, some still missing (mainly coproc instrs)2020-03-15T11:43:49Ziximeowme@iximeow.net2020-03-15T11:43:49Zurn:sha1:0eef8df038ff3a83f31aeeb3c58d5bf652c400ecbring more armv7 tests back to the land of the living2020-02-23T09:17:02Ziximeowme@iximeow.net2020-02-23T09:17:02Zurn:sha1:f4f2c1befecfc841b2a7f5906492b94b16560b9cstrh/ldrh/strht/ldrht and some misc cleanup2020-02-18T05:01:06Ziximeowme@iximeow.net2020-02-18T05:01:06Zurn:sha1:43f38937cfcae8bc4eaf95acfc85ed50fb9a07a3entirely replace armv7 operands2020-02-18T02:33:11Ziximeowme@iximeow.net2020-02-18T02:33:11Zurn:sha1:61541d356e6c9d378a85697778685b410fcbee1b
Operands was an enum covering all forms of operands and data for each
operand for all instructions. this is hard to iterate, and hard to work
with when a single operand is the one of interest, so it's now replaced
by an array of `Operand` enum instances like other architectures.
in the course of this change, several forms of decoding are broken,
while adding support for some earlier-unsupported multiplies and
instructions like msr and clz
also clearly note which document the comments mentioning page
numbers/figures is referencing