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<title>yaxpeax-arm/tests/armv8, branch 0.4.0</title>
<subtitle>yaxpeax arm decoder</subtitle>
<id>http://git.iximeow.net/yaxpeax-arm/atom?h=0.4.0</id>
<link rel='self' href='http://git.iximeow.net/yaxpeax-arm/atom?h=0.4.0'/>
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<updated>2025-10-19T23:29:05Z</updated>
<entry>
<title>tag instruction decode fixes, differential test precision</title>
<updated>2025-10-19T23:29:05Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2025-10-19T20:50:09Z</published>
<link rel='alternate' type='text/html' href='http://git.iximeow.net/yaxpeax-arm/commit/?id=153b5b3383d016a8a1440b2b932815efed25f847'/>
<id>urn:sha1:153b5b3383d016a8a1440b2b932815efed25f847</id>
<content type='text'>
</content>
</entry>
<entry>
<title>support the rest of PAC instructions. compare to a more recent capstone</title>
<updated>2025-05-25T05:41:28Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2025-05-25T05:27:44Z</published>
<link rel='alternate' type='text/html' href='http://git.iximeow.net/yaxpeax-arm/commit/?id=614d7e8bc6325dd3e632b3e83da627fa6ff9f31a'/>
<id>urn:sha1:614d7e8bc6325dd3e632b3e83da627fa6ff9f31a</id>
<content type='text'>
capstone-rs currently binds an old capstone (4.0), where capstone 5.0 is
where much of the armv8.2+ implementation was ported over from LLVM. so,
differential testing is now pointed to a capstone-rs fork pending the
merge of https://github.com/capstone-rust/capstone-rs/pull/172
</content>
</entry>
<entry>
<title>Add support for `udf`</title>
<updated>2024-06-25T12:48:51Z</updated>
<author>
<name>Martin Fink</name>
<email>martin@finkmartin.com</email>
</author>
<published>2024-06-25T12:45:12Z</published>
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<id>urn:sha1:a9ce9a8365eb66507b9bcacb4236af77bd33c620</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix uxtb/uxth alias being incorrectly applied with x-size registers</title>
<updated>2024-03-17T08:56:24Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T08:56:24Z</published>
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<id>urn:sha1:c3f1cd87d7d504841e0221309c53f4d009bf2b22</id>
<content type='text'>
</content>
</entry>
<entry>
<title>when decoding invalid opcodes, return errors. better testing for this circumstance.</title>
<updated>2024-03-17T06:25:49Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T06:25:49Z</published>
<link rel='alternate' type='text/html' href='http://git.iximeow.net/yaxpeax-arm/commit/?id=2ea9ea69b3c6fe033c82df16b310acd6aa8a6728'/>
<id>urn:sha1:2ea9ea69b3c6fe033c82df16b310acd6aa8a6728</id>
<content type='text'>
</content>
</entry>
<entry>
<title>disassembling sb is fine, tests ensure it happens now</title>
<updated>2024-03-17T06:25:11Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T06:25:11Z</published>
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<id>urn:sha1:b0ad39339b8ad835248e5e9368392163012ecb07</id>
<content type='text'>
</content>
</entry>
<entry>
<title>be more explicit about undefined system instructions being invalid</title>
<updated>2024-03-17T02:44:57Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T02:44:57Z</published>
<link rel='alternate' type='text/html' href='http://git.iximeow.net/yaxpeax-arm/commit/?id=a91c1c50a39ff68a7e73cef70829e8a5b08b4b6b'/>
<id>urn:sha1:a91c1c50a39ff68a7e73cef70829e8a5b08b4b6b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>system instruction and register improvements</title>
<updated>2024-03-17T02:34:27Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T02:34:27Z</published>
<link rel='alternate' type='text/html' href='http://git.iximeow.net/yaxpeax-arm/commit/?id=79d220ce177833f7dd80e15e1094bbfbf4c6f8b1'/>
<id>urn:sha1:79d220ce177833f7dd80e15e1094bbfbf4c6f8b1</id>
<content type='text'>
* cN instead of crN for control registers
* # for immediates in sys/sysl instructions
* write out ARM system register names in the way the ARM reference manual says
</content>
</entry>
<entry>
<title>ldrab and ldraa tests, fix immediate decoding</title>
<updated>2024-03-16T23:35:23Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-16T23:35:23Z</published>
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<id>urn:sha1:2b0930355d87d7f195a7ff05d18b09b61a5ea490</id>
<content type='text'>
</content>
</entry>
<entry>
<title>test dmb and make immediates shown with the immediate prefix</title>
<updated>2024-03-16T22:44:38Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-16T22:44:38Z</published>
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<id>urn:sha1:edfbf64598793284ddc3554dd2b264c1491d9a2f</id>
<content type='text'>
</content>
</entry>
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