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<title>yaxpeax-arm/tests, branch 0.3.0</title>
<subtitle>yaxpeax arm decoder</subtitle>
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<entry>
<title>Add support for `udf`</title>
<updated>2024-06-25T12:48:51+00:00</updated>
<author>
<name>Martin Fink</name>
<email>martin@finkmartin.com</email>
</author>
<published>2024-06-25T12:45:12+00:00</published>
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<entry>
<title>run non-panicking tests with a horkton of parallelism</title>
<updated>2024-03-17T18:20:39+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T18:20:39+00:00</published>
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they run in minute or so now

and the thumb mode panics....???
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they run in minute or so now

and the thumb mode panics....???
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</entry>
<entry>
<title>armv8 no-panic test is now multithreaded</title>
<updated>2024-03-17T17:41:13+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T17:41:03+00:00</published>
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<entry>
<title>fix uxtb/uxth alias being incorrectly applied with x-size registers</title>
<updated>2024-03-17T08:56:24+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T08:56:24+00:00</published>
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<entry>
<title>when decoding invalid opcodes, return errors. better testing for this circumstance.</title>
<updated>2024-03-17T06:25:49+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T06:25:49+00:00</published>
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<entry>
<title>disassembling sb is fine, tests ensure it happens now</title>
<updated>2024-03-17T06:25:11+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T06:25:11+00:00</published>
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<entry>
<title>be more explicit about undefined system instructions being invalid</title>
<updated>2024-03-17T02:44:57+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T02:44:57+00:00</published>
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<entry>
<title>system instruction and register improvements</title>
<updated>2024-03-17T02:34:27+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-17T02:34:27+00:00</published>
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* cN instead of crN for control registers
* # for immediates in sys/sysl instructions
* write out ARM system register names in the way the ARM reference manual says
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* cN instead of crN for control registers
* # for immediates in sys/sysl instructions
* write out ARM system register names in the way the ARM reference manual says
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</entry>
<entry>
<title>ldrab and ldraa tests, fix immediate decoding</title>
<updated>2024-03-16T23:35:23+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-16T23:35:23+00:00</published>
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<entry>
<title>test dmb and make immediates shown with the immediate prefix</title>
<updated>2024-03-16T22:44:38+00:00</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2024-03-16T22:44:38+00:00</published>
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