yaxpeax-x86, branch 1.2.2

version bump for 1.2.2

2023-12-17T00:13:17+00:00

fix hreset being disassembled as having second operand of "Nothing"

2023-12-17T00:12:25+00:00

just report it having one operand...

fix incorrect register class names in long_mode

2023-12-16T23:54:25+00:00

also adjust changelog for a 1.2.1 version again, no new interfaces to go
with these bugfixes.

fix incorrect register selection for `vpbroadcastm{b2q,w2d}` with `rex.b` set

2023-12-16T23:24:26+00:00

fix incorrect register selection for `vpmov*2m` with `rex.r` set

2023-12-16T23:05:08+00:00

fix incorrect register selection for `vpmovm2*` with `rex.b` set

2023-12-16T22:47:02+00:00

abnormal memory sizes for keylocker instructions are not bugs

2023-12-16T22:44:07+00:00

new `does_not_decode_invalid_registers` fuzzer found other bugs! the
384-bit accesses for 128b keylocker instructions are an
otherwise-unknown size and had a memory size of `BUG`. they are not
bugs. give the memory size a real name.

reword new changelog entries

2023-12-16T22:12:01+00:00

fix opportunity for unhandled register synonyms

2023-12-16T21:26:48+00:00

registers `al`, `cl`, `dl`, and `bl` could have two different
representations - with `rex.w` and without. these two forms of `RegSpec`
would not compare equal, nor has the same, so for code relying on
`RegSpec` to faithfully represent a 1-1 mapping to x86 registers, these
synonyms would introduce bugs in register analysis.

for example, in `yaxpeax-core`, this would result in instructions
writing to `rex.w al` not being visible as definitions for a future
read of `!rex.w al`.

fix this in `x86_64` code, add new test cases about the confusion,
adjust register names to make this situation more clearly a bug, and
introduce two new fuzz targets that would have helped spot this error.

update changelog, bump version number for future publish

2023-12-16T01:56:31+00:00