this is a squash of a few months' hacking, including but not limited to
what eventually got extracted into
https://git.iximeow.net/asmlinator/about/

the path here is generally not historically interesting, and the vast
majority of this diff is very particular static data tables
(BehaviorDigests and implicit operand lists)

`src/long_mode/behavior.rs` will more or less be directly adapted into
versions for x86-32 and x86-16, similar to the instruction decoders.

this is backed by the new IsaSettings trait. the existing InstDecoders
are unchanged, except that they implement this new trait.

also add new `DecodeEverything` structs with `IsaSettings` impls that
are unconditionally set to permit anything the decoder can be configured
to conditionally accept or reject.

in the process, add new `_3dnow` flag and stop accepting 3dnow
instructions in uarch-specific decoder settings that would not have
3dnow instructions.

update AMD microarchitectures and cross-ref chip directory

additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base

also add builders to get decoders appropriate for specific
microarchitectures from intel and amd
* low-power architectures are not yet present