yaxpeax-x86/src/protected_mode/isa_settings.rs, branch 2.1.1 yaxpeax x86 decoder revise_instruction is the same on all bitnesses, so macro it too 2025-06-01T09:21:57+00:00 iximeow me@iximeow.net 2025-06-01T09:11:30+00:00 54538a07bf4e0b8b2335e146198cda02a49589c8 






DecodeEverything wasn't useful, no better than InstDecoder::default()??
2025-06-01T09:21:57+00:00

iximeow
me@iximeow.net

2025-06-01T08:46:23+00:00

72968a35438e5284a0ba63c947e70f8880b3abb5












cpu feature bits are the same across 64/32/16-bit
2025-06-01T09:21:57+00:00

iximeow
me@iximeow.net

2025-05-31T20:39:26+00:00

a4204b5a3807bf41a2bb5801f874e7f263f8db1f












expand isa feature selection to more bits
2025-06-01T09:21:37+00:00

iximeow
me@iximeow.net

2024-08-17T04:21:16+00:00

08eed360fea81ab9328fd0859b813ee01937b5b1

this is backed by the new IsaSettings trait. the existing InstDecoders
are unchanged, except that they implement this new trait.

also add new `DecodeEverything` structs with `IsaSettings` impls that
are unconditionally set to permit anything the decoder can be configured
to conditionally accept or reject.

in the process, add new `_3dnow` flag and stop accepting 3dnow
instructions in uarch-specific decoder settings that would not have
3dnow instructions.

update AMD microarchitectures and cross-ref chip directory





this is backed by the new IsaSettings trait. the existing InstDecoders
are unchanged, except that they implement this new trait.

also add new `DecodeEverything` structs with `IsaSettings` impls that
are unconditionally set to permit anything the decoder can be configured
to conditionally accept or reject.

in the process, add new `_3dnow` flag and stop accepting 3dnow
instructions in uarch-specific decoder settings that would not have
3dnow instructions.

update AMD microarchitectures and cross-ref chip directory