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<title>yaxpeax-x86/test, branch 0.0.10</title>
<subtitle>yaxpeax x86 decoder</subtitle>
<id>http://git.iximeow.net/yaxpeax-x86/atom?h=0.0.10</id>
<link rel='self' href='http://git.iximeow.net/yaxpeax-x86/atom?h=0.0.10'/>
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<updated>2020-03-22T20:41:05Z</updated>
<entry>
<title>yaxpeax-x86 decodes in 32-bit mode now</title>
<updated>2020-03-22T20:41:05Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-03-22T20:41:05Z</published>
<link rel='alternate' type='text/html' href='http://git.iximeow.net/yaxpeax-x86/commit/?id=0551aa5998226769e64b9e47ba1906c7a0cc3270'/>
<id>urn:sha1:0551aa5998226769e64b9e47ba1906c7a0cc3270</id>
<content type='text'>
</content>
</entry>
<entry>
<title>remove unused function</title>
<updated>2020-02-23T01:00:23Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-23T01:00:12Z</published>
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<id>urn:sha1:8f363fcdb3fd8cd588b787874ea94b6fb83dff39</id>
<content type='text'>
</content>
</entry>
<entry>
<title>support most avx operand codes</title>
<updated>2020-02-23T00:21:03Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-23T00:21:03Z</published>
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<id>urn:sha1:f3d8bb582c1c3e97d8002975a3da6223b263b40f</id>
<content type='text'>
avx is still incomplete, but less so

avx is still practically untested
</content>
</entry>
<entry>
<title>fix {jmp,call} &lt;reg&gt;, as well as jmpf/callf</title>
<updated>2020-02-22T23:38:41Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-22T23:38:41Z</published>
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<id>urn:sha1:802679e4f8362d3c819b83223854c638cc8f2b7f</id>
<content type='text'>
also support vmxon to finish out the f30f opcode map

add tests for forms of inc/dec, as well as TODOs, as yaxpeax-x86 doesn't
provide a way to distinguish different operand sizes (yet)
</content>
</entry>
<entry>
<title>more sse/sse2 support</title>
<updated>2020-02-22T23:12:37Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-22T23:12:37Z</published>
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<id>urn:sha1:d1787896dacc4821ebf399508472b3985ab2a232</id>
<content type='text'>
largely f20f/f30f opcode map items
</content>
</entry>
<entry>
<title>add vmclear test</title>
<updated>2020-02-22T08:53:41Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-22T08:53:41Z</published>
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<id>urn:sha1:cb6a086884adc0ea2119f5619f3616e31f34ffa5</id>
<content type='text'>
this instruction is decoded with the sse2 660f map but not actually added in sse2
</content>
</entry>
<entry>
<title>support 660f sse2 instructions</title>
<updated>2020-02-22T08:52:38Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-22T08:51:30Z</published>
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<id>urn:sha1:33c520341b373ac18e7924eb9227615ac65c2618</id>
<content type='text'>
this isn't quite all of sse2, but gets close. the f20f opcode map still
needs some touching up.

also fix `G_E_xmm_Ib` not respecting rex.r for the rrr operand
</content>
</entry>
<entry>
<title>embarassingly had OperandSpec variants for modrm displacement == 0 backwards</title>
<updated>2020-02-16T10:02:32Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-16T10:02:32Z</published>
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<id>urn:sha1:78d0c21c475fce65c36e64a36c26c689bee0faae</id>
<content type='text'>
</content>
</entry>
<entry>
<title>support `in` and `out` instructions</title>
<updated>2020-02-11T09:00:34Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-11T09:00:34Z</published>
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<id>urn:sha1:0c1d6fc73c90f906aa2ed5dbdde1ade153e6a0ad</id>
<content type='text'>
</content>
</entry>
<entry>
<title>add `RegSpec::name` to get `&amp;'static str` labels for registers</title>
<updated>2020-02-11T08:22:16Z</updated>
<author>
<name>iximeow</name>
<email>me@iximeow.net</email>
</author>
<published>2020-02-11T08:22:16Z</published>
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<id>urn:sha1:bd9ae00ba84275c9414298d016da21e8106cda36</id>
<content type='text'>
</content>
</entry>
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