From 7ac3733578f5959ef7262ad6c2a4718f1d4a5c3b Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Fri, 11 Sep 2026 16:58:10 +0000
Subject: immediate consistency across the library

---
 src/armv7/display.rs |  4 +---
 tests/armv7/thumb.rs | 18 +++++++++---------
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/src/armv7/display.rs b/src/armv7/display.rs
index 7b0be82..d8d67a2 100644
--- a/src/armv7/display.rs
+++ b/src/armv7/display.rs
@@ -301,12 +301,10 @@ impl<T: DisplaySink> crate::armv7::OperandVisitor for DisplayingOperandVisitor<'
     }
 
     fn visit_imm12(&mut self, imm: u16) -> Result<Self::Ok, Self::Error> {
-        self.f.write_char('#')?;
         self.f.write_prefixed_u16(imm)
     }
 
     fn visit_imm32(&mut self, imm: u32) -> Result<Self::Ok, Self::Error> {
-        self.f.write_char('#')?;
         self.f.write_prefixed_u32(imm)
     }
 
@@ -686,7 +684,7 @@ pub(crate) fn visit_inst<T: DisplaySink>(instr: &Instruction, out: &mut T) -> fm
                 }
                 if let Operand::Imm12(mode) = &instr.operands[1] {
                     if comma { out.write_char(',')?; }
-                    out.write_fixed_size(" #")?;
+                    out.write_fixed_size(" ")?;
                     out.write_prefixed_u16(*mode)?;
                 }
                 return Ok(());
diff --git a/tests/armv7/thumb.rs b/tests/armv7/thumb.rs
index ed9ae0e..4d33f47 100644
--- a/tests/armv7/thumb.rs
+++ b/tests/armv7/thumb.rs
@@ -4711,41 +4711,41 @@ fn smml() {
 fn prefetch() {
     test_display(
         &[0xb0, 0xf8, 0x03, 0xfe],
-        "pld.w [r0, #0xe03]"
+        "pld.w [r0, 0xe03]"
     );
     // ldrb with upper word bit 7 clear is just ldrb,
     // but with it set it would be pld
     test_display(
         &[0x11, 0xf8, 0x78, 0xff],
-        "ldrb.w pc, [r1, #0x78]!"
+        "ldrb.w pc, [r1, 0x78]!"
     );
     test_display(
         &[0x91, 0xf8, 0x78, 0xff],
-        "pld.w [r1, #0xf78]"
+        "pld.w [r1, 0xf78]"
     );
     // likewise, ldrh with bits 7, 8 clear Rt=1111 is only prefetch
     // for some op2 patterns..
     test_display(
         &[0x3b, 0xf8, 0x78, 0xff],
-        "ldrh.w pc, [fp, #0x78]!"
+        "ldrh.w pc, [fp, 0x78]!"
     );
     test_display(
         &[0x3b, 0xf8, 0x78, 0xfc],
-        "pld.w [fp, #-0x78]"
+        "pld.w [fp, -0x78]"
     );
     test_display(
         &[0x3b, 0xf8, 0x38, 0xf0],
-        "pld.w [fp, r8, lsl #3]"
+        "pld.w [fp, r8, lsl 3]"
     );
     // and ldrbt also does not become pld on rt==1111
     test_display(
         &[0x10, 0xf8, 0x7c, 0xfe],
-        "ldrbt.w pc, [r0, #0x7c]"
+        "ldrbt.w pc, [r0, 0x7c]"
     );
 
     test_display(
         &[0x93, 0xf9, 0x00, 0xf6],
-        "pli.w [r3, #0x6000x78]"
+        "pli.w [r3, 0x600]"
     );
 }
 
@@ -4753,7 +4753,7 @@ fn prefetch() {
 fn hvc() {
     test_display(
         &[0xe2, 0xf7, 0x00, 0x81],
-        "hvc.w #0x2100"
+        "hvc.w 0x2100"
     );
 }
 
-- 
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