From 82df9f3af144814889afb7e289d04dcc1ffa5dbf Mon Sep 17 00:00:00 2001 From: Brandon Ros Date: Thu, 2 Jul 2026 23:20:56 -0400 Subject: fix several thumb2 decode bugs - 32-bit store encodings with the imm12 bit (bit 23) set were decoded as the register-offset form when imm12 < 64, or as strbt/strht/strt when imm12 was 0xExx. bit 23 set always means the imm12 form. - movw/movt packed imm4 at bit 16 instead of bit 12, producing 20-bit immediates (e.g. 0xf0005 instead of 0xf005) - mvn (immediate) was decoded as mov, dropping the bitwise not - ror (immediate) was decoded as asr all cases verified against binutils objdump --- CHANGELOG | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'CHANGELOG') diff --git a/CHANGELOG b/CHANGELOG index 2c08422..5a6dc75 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -22,6 +22,13 @@ several fixes from @Grond66: * TST/TEQ decoded "three operands" in some cases when they only have two. * ARMv7: do not print the "s" suffix for instructions that unconditionally set flags. +as well as thumb2 fixes from @brandonros: +* thumb2: wide store encodings were very confused about offset widths. +* thumb2: movw/movt incorrectly reassembled 16-bit immediates into 20-bit immediates. +* thumb2: some instructions had outright incorrect opcodes: + * ror (immediate) was decoded as asr, + * mvn (immediate) was decoded as mov, + thank you for the patches! ## 0.4.0 -- cgit v1.1