From cb36e55f64ae1a941b20d2d6d6b5e546566072f8 Mon Sep 17 00:00:00 2001 From: Grond Date: Wed, 24 Jun 2026 14:54:05 -0700 Subject: Decode the correct number of operands for CMP/CMN (immediate/register) This also incidentally fixes an issue where MOV/MVN instructions with a shifted operand could be decoded as if they had 3 operands. --- CHANGELOG | 2 ++ 1 file changed, 2 insertions(+) (limited to 'CHANGELOG') diff --git a/CHANGELOG b/CHANGELOG index 8229e4d..1bb05d3 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -17,6 +17,8 @@ several fixes from @Grond66: * ARMv7: reject unconditional instructions with op1=1111xxxx. these were decoded as CDP, MCR, or MRC when the bit pattern is actually undefined. * ARMv7: fix inverted reserved bit test for some ldr*/str* (immediate) forms. +* ARMv7: fix several issues with data processing instructions: + * CMP/CMN decoded "three operands" when they only have two. thank you for the patches! -- cgit v1.1