From fa24eedf78fb9fe2d87ac3f59763e25d3ba4462f Mon Sep 17 00:00:00 2001 From: rva3 Date: Fri, 20 Feb 2026 03:45:01 +0200 Subject: support A1 encoding of several coprocessor instructions + SVC initially was "implement MCR/MRC decoding", but expanded to include the whole coprocessor space for completeness, and then SVC is right there too. Neon instructions in this space are still rejected, as neon support is not really there yet. Co-authored-by: iximeow --- CHANGELOG | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'CHANGELOG') diff --git a/CHANGELOG b/CHANGELOG index 5f8a3c5..fa8ed2f 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,11 @@ * ARMv7 instructions now impl Copy and Clone, matching A64 instructions and so many enums/structures from decoded instructions. +* ARMv7: expand support for coprocessor, SVC instructions. (thank you @rva333!) + * support non-Thumb encoding of SVC + * support non-`*2` forms of coprocessor instructions + * collapse `*2` encoding choice for coprocessor instructions into a paramter + on the opcode (rather than distinct opcodes) ## 0.4.0 -- cgit v1.1