From fa428aefa6789c744e1e887a719fc2a07ad00188 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 2 Aug 2026 19:58:02 +0000
Subject: sufficiently advanced SIMD is indistinguishable from coprocessors

---
 CHANGELOG | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'CHANGELOG')

diff --git a/CHANGELOG b/CHANGELOG
index 5566e82..11a47c6 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -16,6 +16,8 @@
   saved) program status register, was reported as a banked GPR.
 * ARMv8: support thumb2 encoding of `Test Target` instruction, `Opcode::TT`
   (formatted as any of `tt`, `ttt`, `tta`, `ttat`)
+* ARMv8: formerly-coprocessor instructions have been defined into SIMD extensions,
+  meaning some MRC/MCR/CDP instructions have become `DecodeError::Incomplete`
 
 several fixes from @Grond66:
 * ARMv7: support the RRX rotate mode.
-- 
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