From 1c03f9be10d03c63d9c6eed1e56333763fee628d Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Tue, 28 Jul 2026 02:53:04 +0000
Subject: temp, armv8-thumb

---
 src/armv7.rs | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

(limited to 'src/armv7.rs')

diff --git a/src/armv7.rs b/src/armv7.rs
index fd850ae..54bb998 100644
--- a/src/armv7.rs
+++ b/src/armv7.rs
@@ -259,6 +259,24 @@ pub enum Opcode {
     UDIV,
     SMLALD(bool),
     SMLSLD(bool),
+
+    // well.. this is kind of awkward.. this module really is *a32* (and t32). armv8 adds new
+    // instructions to both modes. nothing below is "armv7" even though that's the module name.
+    // this all needs new names. sorry!
+    STLB,
+    STLH,
+    STL,
+    STLEXB,
+    STLEXH,
+    STLEX,
+    STLEXD,
+    LDAB,
+    LDAH,
+    LDA,
+    LDAEXB,
+    LDAEXH,
+    LDAEX,
+    LDAEXD,
 }
 
 static DATA_PROCESSING_OPCODES: [Opcode; 16] = [
-- 
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