From 57aa49ef6b0b5cfc040606a4e2b2f2d097d8aee4 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sat, 9 Mar 2024 18:00:42 -0800 Subject: improve msr register decoding "improve" rather than "fix" as `pstate.0x3` is hardly as useful as `msr uao, #3`. but the "pstate field" that had been decoded before was totally incorrect. --- src/armv8/a64.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/armv8') diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index 0704262..a1fc8bf 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -2872,7 +2872,7 @@ pub enum Operand { /// /// this operand will display as, for example, `cr5`. ControlReg(u16), - /// a selector for a field of the `pstate` control register. + /// a selector for a field of the `pstate` control registers. /// /// `yaxpeax-arm` does not name specific fields of `pstate` yet, so this operand displays as /// `pstate.0x50`. @@ -2937,7 +2937,7 @@ impl Display for Operand { } } Operand::PstateField(reg) => { - // `MSR (immediate)` writes to the `PSTATE` register, setting a few bit patterns as + // `MSR (immediate)` writes to the `PSTATE` registers, setting a few bit patterns as // selected by `reg`. write!(fmt, "pstate.{:#x}", reg) } @@ -10399,7 +10399,7 @@ impl Decoder for InstDecoder { */ inst.operands = [ - Operand::PstateField(((op1 << 3) | op2 << 3) as u8), + Operand::PstateField(((op1 << 3) | op2) as u8), Operand::Imm16( ((word >> 8) & 0xf) as u16 ), -- cgit v1.1