From f4cd06d1ca6bbb8ecd5e24e0c1bf4143d95a63c0 Mon Sep 17 00:00:00 2001 From: iximeow Date: Thu, 6 Aug 2026 15:39:18 +0000 Subject: cdp/mrc/mcr opc1 is wider than display knows i *think* this is fixing an issue that was introduced in the diff between 0.4.0 and 0.5.0, so it's elided from the changelog.. --- src/armv7/display.rs | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/armv7/display.rs b/src/armv7/display.rs index 4ed7b64..5a48362 100644 --- a/src/armv7/display.rs +++ b/src/armv7/display.rs @@ -531,8 +531,13 @@ pub(crate) fn visit_inst(instr: &Instruction, out: &mut T) -> fm out.write_char(' ')?; write_coproc(coproc, out)?; out.write_fixed_size(", ")?; - // opc1 is a 3-bit field - out.write_char((opc + 0x30) as char)?; + // mrc/mcr have 3-bit opc1, but mrrc/mcrr have 4-bit opc1 + if opc >= 10 { + out.write_char('1')?; + out.write_char((opc - 10 + 0x30) as char)?; + } else { + out.write_char((opc + 0x30) as char)?; + } let ops = instr.operands.iter(); for op in ops { @@ -586,8 +591,13 @@ pub(crate) fn visit_inst(instr: &Instruction, out: &mut T) -> fm out.write_char(' ')?; write_coproc(coproc, out)?; out.write_fixed_size(", ")?; - // opc1 is a 3-bit field - out.write_char((opc1 + 0x30) as char)?; + // opc1 is a 3-bit field for MCR and MRC, but is four bits for CDP + if opc1 >= 10 { + out.write_char('1')?; + out.write_char((opc1 - 10 + 0x30) as char)?; + } else { + out.write_char((opc1 + 0x30) as char)?; + } let ops = instr.operands.iter(); for op in ops { -- cgit v1.1