From 485aaac0f82e6b5546ae392b6be626c4558cc26a Mon Sep 17 00:00:00 2001 From: Grond Date: Wed, 24 Jun 2026 18:58:33 -0700 Subject: Decode the correct number of operands for TST/TEQ (immediate/register) --- tests/armv7/mod.rs | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'tests') diff --git a/tests/armv7/mod.rs b/tests/armv7/mod.rs index 78d725b..310b3f7 100644 --- a/tests/armv7/mod.rs +++ b/tests/armv7/mod.rs @@ -746,6 +746,22 @@ fn test_cmp_register_decode() { test_all([0x11, 0x03, 0x72, 0xe1], "cmns r2, r1, lsl r3"); } +#[test] +fn test_tst_immediate_decode() { + test_all([0xe6, 0x00, 0x18, 0xe3], "tsts r8, 0xe6"); + test_all([0xe6, 0x00, 0x38, 0xe3], "teqs r8, 0xe6"); +} + +#[test] +fn test_tst_register_decode() { + test_all([0x01, 0x00, 0x12, 0xe1], "tsts r2, r1"); + test_all([0x01, 0x03, 0x12, 0xe1], "tsts r2, r1, lsl 6"); + test_all([0x11, 0x03, 0x12, 0xe1], "tsts r2, r1, lsl r3"); + test_all([0x01, 0x00, 0x32, 0xe1], "teqs r2, r1"); + test_all([0x01, 0x03, 0x32, 0xe1], "teqs r2, r1, lsl 6"); + test_all([0x11, 0x03, 0x32, 0xe1], "teqs r2, r1, lsl r3"); +} + static INSTRUCTION_BYTES: [u8; 4 * 60] = [ 0x24, 0xc0, 0x9f, 0xe5, 0x00, 0xb0, 0xa0, 0xe3, -- cgit v1.1