From 97c724d483c309b95cba75dae3445b069e8b7915 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sat, 16 Mar 2024 11:50:08 -0700 Subject: fix ldrsw register size also unignore tests that would have caught this fix test expectation that predated using pc-relative syntax and fix a test that expected an instruction to be disassembled as "invalid" successfully, rather than returning an error --- tests/armv8/a64.rs | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'tests') diff --git a/tests/armv8/a64.rs b/tests/armv8/a64.rs index b3838cc..6af5291 100644 --- a/tests/armv8/a64.rs +++ b/tests/armv8/a64.rs @@ -153,7 +153,6 @@ fn test_decode_misc() { ); } -#[ignore] #[test] fn test_display_ldr() { test_display( @@ -168,10 +167,7 @@ fn test_display_ldr() { [0xff, 0xff, 0x00, 0x9c], "ldr q31, $+0x1ffc" ); - test_display( - [0xff, 0xff, 0x00, 0xdc], - "invalid" - ); + test_err([0xff, 0xff, 0x00, 0xdc], DecodeError::InvalidOpcode); test_display( [0x88, 0xff, 0x00, 0x18], "ldr w8, $+0x1ff0" @@ -186,7 +182,7 @@ fn test_display_ldr() { ); test_display( [0x88, 0xff, 0x00, 0xd8], - "prfm plil1keep, #0x1ff0" + "prfm plil1keep, $+0x1ff0" ); } -- cgit v1.1