From 1be3c8e7db701f7fabb23d7b771eedb5bb4f3b68 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sun, 1 Dec 2019 04:47:40 -0800 Subject: more cvt variants --- src/display.rs | 2 ++ src/lib.rs | 30 ++++++++++++++++++++++++++---- test/test.rs | 5 +++-- 3 files changed, 31 insertions(+), 6 deletions(-) diff --git a/src/display.rs b/src/display.rs index 029eed3..156998a 100644 --- a/src/display.rs +++ b/src/display.rs @@ -428,6 +428,7 @@ impl fmt::Display for Opcode { &Opcode::COMISS => write!(f, "{}", "comiss"), &Opcode::CVTDQ2PS => write!(f, "{}", "cvtdq2ps"), &Opcode::CVTPI2PS => write!(f, "{}", "cvtpi2ps"), + &Opcode::CVTPI2PD => write!(f, "{}", "cvtpi2pd"), &Opcode::CVTPS2PD => write!(f, "{}", "cvtps2pd"), &Opcode::CVTPS2PI => write!(f, "{}", "cvtps2pi"), &Opcode::CVTTPS2PI => write!(f, "{}", "cvttps2pi"), @@ -689,6 +690,7 @@ impl Colorize for Opcode { Opcode::CVTDQ2PS | Opcode::CVTPD2DQ | Opcode::CVTPI2PS | + Opcode::CVTPI2PD | Opcode::CVTPS2PD | Opcode::CVTPS2PI | Opcode::CVTSD2SI | diff --git a/src/lib.rs b/src/lib.rs index 6ecc5da..815f51b 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -609,6 +609,7 @@ pub enum Opcode { COMISS, CVTDQ2PS, CVTPI2PS, + CVTPI2PD, CVTPS2PD, CVTPS2PI, CVTTPS2PI, @@ -1235,6 +1236,8 @@ pub enum OperandCode { G_E_mm = 0xe7, Edq_G_mm = 0xe9, E_G_mm = 0xeb, + G_xmm_E_mm = 0xed, + G_xmm_Edq = 0xef, } fn base_opcode_map(v: u8) -> Opcode { @@ -1307,7 +1310,7 @@ const OPCODE_660F_MAP: [OpcodeRecord; 256] = [ OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::MOVAPD), OperandCode::G_E_xmm), OpcodeRecord(Interpretation::Instruction(Opcode::MOVAPD), OperandCode::E_G_xmm), - OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTPI2PD), OperandCode::G_xmm_E_mm), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -1588,7 +1591,7 @@ const OPCODE_F20F_MAP: [OpcodeRecord; 256] = [ OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - OpcodeRecord(Interpretation::Instruction(Opcode::CVTSI2SD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTSI2SD), OperandCode::G_xmm_Edq), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::CVTTSD2SI), OperandCode::G_E_xmm), OpcodeRecord(Interpretation::Instruction(Opcode::CVTSD2SI), OperandCode::G_E_xmm), @@ -1869,7 +1872,7 @@ const OPCODE_F30F_MAP: [OpcodeRecord; 256] = [ OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - OpcodeRecord(Interpretation::Instruction(Opcode::CVTSI2SS), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTSI2SS), OperandCode::G_xmm_Edq), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::CVTTSS2SI), OperandCode::G_E_xmm), OpcodeRecord(Interpretation::Instruction(Opcode::CVTSS2SI), OperandCode::G_E_xmm), @@ -2179,7 +2182,7 @@ const OPCODE_0F_MAP: [OpcodeRecord; 256] = [ OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::MOVAPS), OperandCode::G_E_xmm), OpcodeRecord(Interpretation::Instruction(Opcode::MOVAPS), OperandCode::E_G_xmm), - OpcodeRecord(Interpretation::Instruction(Opcode::CVTPI2PS), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTPI2PS), OperandCode::G_xmm_E_mm), OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTPS), OperandCode::M_G_xmm), OpcodeRecord(Interpretation::Instruction(Opcode::CVTTPS2PI), OperandCode::G_mm_E_xmm), OpcodeRecord(Interpretation::Instruction(Opcode::CVTPS2PI), OperandCode::G_mm_E_xmm), @@ -3603,6 +3606,17 @@ fn unlikely_operands>(mut bytes_iter: T, instruction: &mut instruction.modrm_mmm.bank = RegisterBank::D; } }, + OperandCode::G_xmm_Edq => { + instruction.operands[1] = mem_oper; + instruction.modrm_rrr.bank = RegisterBank::X; + if mem_oper == OperandSpec::RegMMM { + if instruction.prefixes.rex().w() { + instruction.modrm_mmm.bank = RegisterBank::Q; + } else { + instruction.modrm_mmm.bank = RegisterBank::D; + } + } + }, OperandCode::G_xmm_Eq => { instruction.operands[1] = mem_oper; instruction.modrm_rrr.bank = RegisterBank::X; @@ -3618,6 +3632,14 @@ fn unlikely_operands>(mut bytes_iter: T, instruction: &mut instruction.modrm_mmm.bank = RegisterBank::X; } }, + OperandCode::G_xmm_E_mm => { + instruction.operands[1] = mem_oper; + instruction.modrm_rrr.bank = RegisterBank::X; + if mem_oper == OperandSpec::RegMMM { + instruction.modrm_mmm.bank = RegisterBank::MM; + instruction.modrm_mmm.num &= 0b111; + } + }, // sure hope these aren't backwards huh OperandCode::AL_Xb => { instruction.modrm_rrr = RegSpec::al(); diff --git a/test/test.rs b/test/test.rs index ec014ac..4fd08c1 100644 --- a/test/test.rs +++ b/test/test.rs @@ -65,6 +65,7 @@ fn test_cvt() { test_display(&[0x48, 0x0f, 0x2c, 0xcf], "cvttps2pi mm1, xmm7"); test_display(&[0x4f, 0x0f, 0x2c, 0xcf], "cvttps2pi mm1, xmm15"); test_display(&[0x4f, 0x0f, 0x2a, 0xcf], "cvtpi2ps xmm9, mm7"); + test_display(&[0x4f, 0x0f, 0x2a, 0x00], "cvtpi2ps xmm8, [r8]"); test_display(&[0x4f, 0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7"); test_display(&[0x66, 0x4f, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm9, mm7"); test_display(&[0x4f, 0xf3, 0x0f, 0x2a, 0xcf], "cvtsi2ss xmm1, edi"); @@ -75,8 +76,8 @@ fn test_cvt() { test_display(&[0xf2, 0x4f, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm8, [r8]"); test_display(&[0x4f, 0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, [rax]"); test_display(&[0xf3, 0x4f, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm8, [r8]"); - test_display(&[0x4f, 0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, qword [rax]"); - test_display(&[0x66, 0x4f, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm8, qword [r8]"); + test_display(&[0x4f, 0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, [rax]"); + test_display(&[0x66, 0x4f, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm8, [r8]"); } #[test] -- cgit v1.1