From 5a1fd6f773320c845f2549722b9f27094d68bdf2 Mon Sep 17 00:00:00 2001 From: iximeow Date: Mon, 28 Jun 2021 00:09:40 -0700 Subject: protected mode memory sizes also some long-mode cleanup in corresponding areas --- src/long_mode/mod.rs | 4 - src/long_mode/vex.rs | 6 +- src/protected_mode/display.rs | 4 +- src/protected_mode/mod.rs | 688 ++++++++++--- src/protected_mode/vex.rs | 94 +- test/protected_mode/mod.rs | 2179 +++++++++++++++++++++++++++-------------- 6 files changed, 2096 insertions(+), 879 deletions(-) diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 1039260..9fee5b9 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -7479,9 +7479,6 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, let modrm = read_modrm(&mut bytes_iter, length)?; instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 1, length)?; - if instruction.operands[1] != OperandSpec::RegMMM { - instruction.mem_size = 1; - } instruction.modrm_rrr = RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present()); if instruction.operands[1] != OperandSpec::RegMMM { @@ -9747,7 +9744,6 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.opcode = opcode; instruction.mem_size = mem_size; instruction.operands[0] = read_M(&mut bytes_iter, instruction, modrm, length)?; - instruction.mem_size = mem_size; } } OperandCode::ModRM_0x0fba => { diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs index 6db99a1..35f979f 100644 --- a/src/long_mode/vex.rs +++ b/src/long_mode/vex.rs @@ -420,6 +420,7 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.opcode = if modrm & 0xc0 == 0xc0 { Opcode::VMOVHLPS } else { + instruction.mem_size = 4; Opcode::VMOVLPS }; instruction.modrm_rrr = @@ -427,7 +428,6 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = OperandSpec::RegVex; instruction.operands[2] = read_E_xmm(bytes, instruction, modrm, length)?; - instruction.mem_size = 4; instruction.operand_count = 3; Ok(()) } @@ -436,6 +436,7 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.opcode = if modrm & 0xc0 == 0xc0 { Opcode::VMOVLHPS } else { + instruction.mem_size = 8; Opcode::VMOVHPS }; instruction.modrm_rrr = @@ -443,7 +444,6 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = OperandSpec::RegVex; instruction.operands[2] = read_E_xmm(bytes, instruction, modrm, length)?; - instruction.mem_size = 8; instruction.operand_count = 3; Ok(()) } @@ -537,7 +537,6 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[2] = mem_oper; instruction.imm = read_imm_unsigned(bytes, 1, length)?; instruction.operands[3] = OperandSpec::ImmU8; - instruction.mem_size = 1; if mem_oper != OperandSpec::RegMMM { instruction.mem_size = 1; } @@ -555,7 +554,6 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[2] = mem_oper; instruction.imm = read_imm_unsigned(bytes, 1, length)?; instruction.operands[3] = OperandSpec::ImmU8; - instruction.mem_size = 4; if mem_oper != OperandSpec::RegMMM { instruction.mem_size = 4; } diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs index f258bad..1964758 100644 --- a/src/protected_mode/display.rs +++ b/src/protected_mode/display.rs @@ -3314,8 +3314,8 @@ impl Instruction { } const MEM_SIZE_STRINGS: [&'static str; 64] = [ - "byte", "word", "BUG", "dword", "BUG", "BUG", "BUG", "qword", - "far", "mword", "BUG", "BUG", "BUG", "BUG", "BUG", "xmmword", + "byte", "word", "BUG", "dword", "far", "BUG", "BUG", "qword", + "BUG", "mword", "BUG", "BUG", "BUG", "BUG", "BUG", "xmmword", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "ymmword", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", "BUG", diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index dec7c86..971d7a6 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -3662,8 +3662,8 @@ impl InstDecoder { Opcode::VPAND | Opcode::VANDPD | Opcode::VANDPS | - Opcode::VANDNPS | Opcode::VANDNPD | + Opcode::VANDNPS | Opcode::VORPD | Opcode::VORPS | Opcode::VPANDN | @@ -3724,8 +3724,11 @@ impl InstDecoder { Opcode::VPMAXUB | Opcode::VPMAXUW | Opcode::VPMAXUD | + Opcode::VPMINSB | Opcode::VPMINSW | Opcode::VPMINSD | + Opcode::VPMINUB | + Opcode::VPMINUW | Opcode::VPMINUD | Opcode::VPMOVMSKB | Opcode::VPMOVSXBD | @@ -3814,7 +3817,10 @@ impl InstDecoder { Opcode::VUNPCKLPS | Opcode::VXORPD | Opcode::VXORPS | - Opcode::VZEROUPPER => { + Opcode::VZEROUPPER | + Opcode::VZEROALL | + Opcode::VLDMXCSR | + Opcode::VSTMXCSR => { // TODO: check a table for these if !self.avx() { inst.opcode = Opcode::Invalid; @@ -4100,7 +4106,7 @@ impl Instruction { Instruction { prefixes: Prefixes::new(0), opcode: Opcode::Invalid, - mem_size: 1, + mem_size: 0, modrm_rrr: RegSpec::eax(), modrm_mmm: RegSpec::eax(), // doubles as sib_base sib_index: RegSpec::eax(), @@ -4865,7 +4871,6 @@ enum OperandCode { // Gdq_Ed = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(17).bits(), Gd_Ev = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(40).bits(), // Md_Gd = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(51).bits(), - G_E_mm_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().with_imm(false, 0).reg_mem().operand_case(29).bits(), G_E_xmm_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(22).bits(), G_E_xmm_Ub = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(60).bits(), G_U_xmm_Ub = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(61).bits(), @@ -4882,7 +4887,7 @@ enum OperandCode { Gv_M = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().only_modrm_operands().reg_mem().operand_case(25).bits(), MOVDIR64B = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(108).bits(), M_Gv = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(109).bits(), - Gb_Eb_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().with_imm(false, 0).byte_operands().reg_mem().operand_case(40).bits(), + Gv_Ev_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().with_imm(false, 0).reg_mem().operand_case(40).bits(), Gv_Ev_Iv = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(41).bits(), Rv_Gmm_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_modrm().read_E().reg_mem().operand_case(55).bits(), @@ -4895,26 +4900,28 @@ enum OperandCode { Gd_U_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(59).bits(), Gv_E_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(60).bits(), //= 0x816f, // mirror G_xmm_Ed, but also read an immediate - G_xmm_Ed_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(61).bits(), + G_xmm_Ew_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(61).bits(), G_U_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(62).bits(), G_M_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(20).bits(), G_E_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(21).bits(), E_G_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(19).bits(), + G_Ed_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(31).bits(), + Ed_G_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(29).bits(), M_G_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(63).bits(), G_E_mm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(64).bits(), G_U_mm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(65).bits(), E_G_mm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(66).bits(), Ed_G_mm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(67).bits(), - Ed_G_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(68).bits(), + // Ed_G_xmm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(68).bits(), G_mm_Ed = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(69).bits(), G_mm_E = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().mem_reg().operand_case(70).bits(), Ev_Gv_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(71).bits(), Ev_Gv_CL = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(72).bits(), G_mm_U_mm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(73).bits(), - G_Md_mm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(74).bits(), + G_Mq_mm = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().read_E().reg_mem().operand_case(74).bits(), G_mm_Ew_Ib = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(75).bits(), - G_E_d = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(76).bits(), - E_G_d = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(77).bits(), + G_E_q = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(76).bits(), + E_G_q = OperandCodeBuilder::new().op0_is_rrr_and_embedded_instructions().operand_case(77).bits(), CVT_AA = OperandCodeBuilder::new().special_case(77).bits(), CVT_DA = OperandCodeBuilder::new().special_case(78).bits(), Rq_Cq_0 = OperandCodeBuilder::new().special_case(79).bits(), @@ -4946,6 +4953,11 @@ enum OperandCode { SS = OperandCodeBuilder::new().special_case(105).bits(), DS = OperandCodeBuilder::new().special_case(106).bits(), ModRM_0x62 = OperandCodeBuilder::new().special_case(107).bits(), + INV_Gv_M = OperandCodeBuilder::new().special_case(108).bits(), + PMOVX_G_E_xmm = OperandCodeBuilder::new().operand_case(109).bits(), + PMOVX_E_G_xmm = OperandCodeBuilder::new().operand_case(110).bits(), + G_Ev_xmm_Ib = OperandCodeBuilder::new().operand_case(111).bits(), + G_E_mm_Ib = OperandCodeBuilder::new().operand_case(112).bits(), } const LOCKABLE_INSTRUCTIONS: &[Opcode] = &[ @@ -5121,7 +5133,7 @@ const OPCODES: [OpcodeRecord; 256] = [ OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Ivs), OpcodeRecord(Interpretation::Instruction(Opcode::IMUL), OperandCode::Gv_Ev_Iv), OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Ibs), - OpcodeRecord(Interpretation::Instruction(Opcode::IMUL), OperandCode::Gb_Eb_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::IMUL), OperandCode::Gv_Ev_Ib), OpcodeRecord(Interpretation::Instruction(Opcode::INS), OperandCode::Yb_DX), OpcodeRecord(Interpretation::Instruction(Opcode::INS), OperandCode::Yv_DX), OpcodeRecord(Interpretation::Instruction(Opcode::OUTS), OperandCode::DX_Xb), @@ -5574,9 +5586,9 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x0e => OpcodeRecord(Interpretation::Instruction(Opcode::FEMMS), OperandCode::Nothing), 0x0f => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f0f), - 0x10 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSD), OperandCode::G_E_xmm), - 0x11 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSD), OperandCode::E_G_xmm), - 0x12 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVDDUP), OperandCode::G_E_xmm), + 0x10 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSD), OperandCode::PMOVX_G_E_xmm), + 0x11 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSD), OperandCode::PMOVX_E_G_xmm), + 0x12 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVDDUP), OperandCode::PMOVX_G_E_xmm), 0x13 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x14 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x15 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -5603,8 +5615,8 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x29 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x2a => OpcodeRecord(Interpretation::Instruction(Opcode::CVTSI2SD), OperandCode::G_xmm_Ed), 0x2b => OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTSD), OperandCode::M_G_xmm), - 0x2c => OpcodeRecord(Interpretation::Instruction(Opcode::CVTTSD2SI), OperandCode::G_E_xmm), - 0x2d => OpcodeRecord(Interpretation::Instruction(Opcode::CVTSD2SI), OperandCode::G_E_xmm), + 0x2c => OpcodeRecord(Interpretation::Instruction(Opcode::CVTTSD2SI), OperandCode::PMOVX_G_E_xmm), + 0x2d => OpcodeRecord(Interpretation::Instruction(Opcode::CVTSD2SI), OperandCode::PMOVX_G_E_xmm), 0x2e => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x2f => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -5643,21 +5655,21 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x4f => OpcodeRecord(Interpretation::Instruction(Opcode::CMOVG), OperandCode::Gv_Ev), 0x50 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - 0x51 => OpcodeRecord(Interpretation::Instruction(Opcode::SQRTSD), OperandCode::G_E_xmm), + 0x51 => OpcodeRecord(Interpretation::Instruction(Opcode::SQRTSD), OperandCode::PMOVX_G_E_xmm), 0x52 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x53 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x54 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x55 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x56 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x57 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - 0x58 => OpcodeRecord(Interpretation::Instruction(Opcode::ADDSD), OperandCode::G_E_xmm), - 0x59 => OpcodeRecord(Interpretation::Instruction(Opcode::MULSD), OperandCode::G_E_xmm), - 0x5a => OpcodeRecord(Interpretation::Instruction(Opcode::CVTSD2SS), OperandCode::G_E_xmm), + 0x58 => OpcodeRecord(Interpretation::Instruction(Opcode::ADDSD), OperandCode::PMOVX_G_E_xmm), + 0x59 => OpcodeRecord(Interpretation::Instruction(Opcode::MULSD), OperandCode::PMOVX_G_E_xmm), + 0x5a => OpcodeRecord(Interpretation::Instruction(Opcode::CVTSD2SS), OperandCode::PMOVX_G_E_xmm), 0x5b => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - 0x5c => OpcodeRecord(Interpretation::Instruction(Opcode::SUBSD), OperandCode::G_E_xmm), - 0x5d => OpcodeRecord(Interpretation::Instruction(Opcode::MINSD), OperandCode::G_E_xmm), - 0x5e => OpcodeRecord(Interpretation::Instruction(Opcode::DIVSD), OperandCode::G_E_xmm), - 0x5f => OpcodeRecord(Interpretation::Instruction(Opcode::MAXSD), OperandCode::G_E_xmm), + 0x5c => OpcodeRecord(Interpretation::Instruction(Opcode::SUBSD), OperandCode::PMOVX_G_E_xmm), + 0x5d => OpcodeRecord(Interpretation::Instruction(Opcode::MINSD), OperandCode::PMOVX_G_E_xmm), + 0x5e => OpcodeRecord(Interpretation::Instruction(Opcode::DIVSD), OperandCode::PMOVX_G_E_xmm), + 0x5f => OpcodeRecord(Interpretation::Instruction(Opcode::MAXSD), OperandCode::PMOVX_G_E_xmm), 0x60 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x61 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -5749,10 +5761,10 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { // 0xb0 0xb0 => OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Eb_Gb), 0xb1 => OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Ev_Gv), - 0xb2 => OpcodeRecord(Interpretation::Instruction(Opcode::LSS), OperandCode::Gv_M), + 0xb2 => OpcodeRecord(Interpretation::Instruction(Opcode::LSS), OperandCode::INV_Gv_M), 0xb3 => OpcodeRecord(Interpretation::Instruction(Opcode::BTR), OperandCode::Ev_Gv), - 0xb4 => OpcodeRecord(Interpretation::Instruction(Opcode::LFS), OperandCode::Gv_M), - 0xb5 => OpcodeRecord(Interpretation::Instruction(Opcode::LGS), OperandCode::Gv_M), + 0xb4 => OpcodeRecord(Interpretation::Instruction(Opcode::LFS), OperandCode::INV_Gv_M), + 0xb5 => OpcodeRecord(Interpretation::Instruction(Opcode::LGS), OperandCode::INV_Gv_M), 0xb6 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_b), OperandCode::Gv_Eb), 0xb7 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_w), OperandCode::Gv_Ew), 0xb8 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -5851,8 +5863,8 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x0e => OpcodeRecord(Interpretation::Instruction(Opcode::FEMMS), OperandCode::Nothing), 0x0f => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f0f), - 0x10 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSS), OperandCode::G_E_xmm), - 0x11 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSS), OperandCode::E_G_xmm), + 0x10 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSS), OperandCode::G_Ed_xmm), + 0x11 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSS), OperandCode::Ed_G_xmm), 0x12 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVSLDUP), OperandCode::G_E_xmm), 0x13 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x14 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -5920,21 +5932,21 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x4f => OpcodeRecord(Interpretation::Instruction(Opcode::CMOVG), OperandCode::Gv_Ev), // 0x50 0x50 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - 0x51 => OpcodeRecord(Interpretation::Instruction(Opcode::SQRTSS), OperandCode::G_E_xmm), - 0x52 => OpcodeRecord(Interpretation::Instruction(Opcode::RSQRTSS), OperandCode::G_E_xmm), - 0x53 => OpcodeRecord(Interpretation::Instruction(Opcode::RCPSS), OperandCode::G_E_xmm), + 0x51 => OpcodeRecord(Interpretation::Instruction(Opcode::SQRTSS), OperandCode::G_Ed_xmm), + 0x52 => OpcodeRecord(Interpretation::Instruction(Opcode::RSQRTSS), OperandCode::G_Ed_xmm), + 0x53 => OpcodeRecord(Interpretation::Instruction(Opcode::RCPSS), OperandCode::G_Ed_xmm), 0x54 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x55 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x56 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x57 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - 0x58 => OpcodeRecord(Interpretation::Instruction(Opcode::ADDSS), OperandCode::G_E_xmm), - 0x59 => OpcodeRecord(Interpretation::Instruction(Opcode::MULSS), OperandCode::G_E_xmm), - 0x5a => OpcodeRecord(Interpretation::Instruction(Opcode::CVTSS2SD), OperandCode::G_E_xmm), + 0x58 => OpcodeRecord(Interpretation::Instruction(Opcode::ADDSS), OperandCode::G_Ed_xmm), + 0x59 => OpcodeRecord(Interpretation::Instruction(Opcode::MULSS), OperandCode::G_Ed_xmm), + 0x5a => OpcodeRecord(Interpretation::Instruction(Opcode::CVTSS2SD), OperandCode::PMOVX_G_E_xmm), 0x5b => OpcodeRecord(Interpretation::Instruction(Opcode::CVTTPS2DQ), OperandCode::G_E_xmm), - 0x5c => OpcodeRecord(Interpretation::Instruction(Opcode::SUBSS), OperandCode::G_E_xmm), - 0x5d => OpcodeRecord(Interpretation::Instruction(Opcode::MINSS), OperandCode::G_E_xmm), - 0x5e => OpcodeRecord(Interpretation::Instruction(Opcode::DIVSS), OperandCode::G_E_xmm), - 0x5f => OpcodeRecord(Interpretation::Instruction(Opcode::MAXSS), OperandCode::G_E_xmm), + 0x5c => OpcodeRecord(Interpretation::Instruction(Opcode::SUBSS), OperandCode::G_Ed_xmm), + 0x5d => OpcodeRecord(Interpretation::Instruction(Opcode::MINSS), OperandCode::G_Ed_xmm), + 0x5e => OpcodeRecord(Interpretation::Instruction(Opcode::DIVSS), OperandCode::G_Ed_xmm), + 0x5f => OpcodeRecord(Interpretation::Instruction(Opcode::MAXSS), OperandCode::G_Ed_xmm), // 0x60 0x60 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x61 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -6026,10 +6038,10 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { // 0xb0 0xb0 => OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Eb_Gb), 0xb1 => OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Ev_Gv), - 0xb2 => OpcodeRecord(Interpretation::Instruction(Opcode::LSS), OperandCode::Gv_M), + 0xb2 => OpcodeRecord(Interpretation::Instruction(Opcode::LSS), OperandCode::INV_Gv_M), 0xb3 => OpcodeRecord(Interpretation::Instruction(Opcode::BTR), OperandCode::Ev_Gv), - 0xb4 => OpcodeRecord(Interpretation::Instruction(Opcode::LFS), OperandCode::Gv_M), - 0xb5 => OpcodeRecord(Interpretation::Instruction(Opcode::LGS), OperandCode::Gv_M), + 0xb4 => OpcodeRecord(Interpretation::Instruction(Opcode::LFS), OperandCode::INV_Gv_M), + 0xb5 => OpcodeRecord(Interpretation::Instruction(Opcode::LGS), OperandCode::INV_Gv_M), 0xb6 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_b), OperandCode::Gv_Eb), 0xb7 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_w), OperandCode::Gv_Ew), 0xb8 => OpcodeRecord(Interpretation::Instruction(Opcode::POPCNT), OperandCode::Gv_Ev), @@ -6130,12 +6142,12 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x10 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVUPD), OperandCode::G_E_xmm), 0x11 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVUPD), OperandCode::E_G_xmm), - 0x12 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVLPD), OperandCode::G_M_xmm), - 0x13 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVLPD), OperandCode::M_G_xmm), + 0x12 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVLPD), OperandCode::PMOVX_G_E_xmm), + 0x13 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVLPD), OperandCode::PMOVX_E_G_xmm), 0x14 => OpcodeRecord(Interpretation::Instruction(Opcode::UNPCKLPD), OperandCode::G_E_xmm), 0x15 => OpcodeRecord(Interpretation::Instruction(Opcode::UNPCKHPD), OperandCode::G_E_xmm), - 0x16 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVHPD), OperandCode::G_M_xmm), - 0x17 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVHPD), OperandCode::M_G_xmm), + 0x16 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVHPD), OperandCode::PMOVX_G_E_xmm), + 0x17 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVHPD), OperandCode::PMOVX_E_G_xmm), 0x18 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f18), 0x19 => OpcodeRecord(Interpretation::Instruction(Opcode::NOP), OperandCode::Ev), 0x1a => OpcodeRecord(Interpretation::Instruction(Opcode::NOP), OperandCode::Ev), @@ -6159,8 +6171,8 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x2b => OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTPD), OperandCode::M_G_xmm), 0x2c => OpcodeRecord(Interpretation::Instruction(Opcode::CVTTPD2PI), OperandCode::G_mm_E_xmm), 0x2d => OpcodeRecord(Interpretation::Instruction(Opcode::CVTPD2PI), OperandCode::G_mm_E_xmm), - 0x2e => OpcodeRecord(Interpretation::Instruction(Opcode::UCOMISD), OperandCode::G_E_xmm), - 0x2f => OpcodeRecord(Interpretation::Instruction(Opcode::COMISD), OperandCode::G_E_xmm), + 0x2e => OpcodeRecord(Interpretation::Instruction(Opcode::UCOMISD), OperandCode::PMOVX_G_E_xmm), + 0x2f => OpcodeRecord(Interpretation::Instruction(Opcode::COMISD), OperandCode::PMOVX_G_E_xmm), 0x30 => OpcodeRecord(Interpretation::Instruction(Opcode::WRMSR), OperandCode::Nothing), 0x31 => OpcodeRecord(Interpretation::Instruction(Opcode::RDTSC), OperandCode::Nothing), @@ -6319,7 +6331,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0xc1 => OpcodeRecord(Interpretation::Instruction(Opcode::XADD), OperandCode::Ev_Gv), 0xc2 => OpcodeRecord(Interpretation::Instruction(Opcode::CMPPD), OperandCode::G_E_xmm_Ib), 0xc3 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - 0xc4 => OpcodeRecord(Interpretation::Instruction(Opcode::PINSRW), OperandCode::G_xmm_Ed_Ib), + 0xc4 => OpcodeRecord(Interpretation::Instruction(Opcode::PINSRW), OperandCode::G_xmm_Ew_Ib), 0xc5 => OpcodeRecord(Interpretation::Instruction(Opcode::PEXTRW), OperandCode::G_U_xmm_Ub), 0xc6 => OpcodeRecord(Interpretation::Instruction(Opcode::SHUFPD), OperandCode::G_E_xmm_Ib), 0xc7 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0fc7), @@ -6338,7 +6350,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0xd3 => OpcodeRecord(Interpretation::Instruction(Opcode::PSRLQ), OperandCode::G_E_xmm), 0xd4 => OpcodeRecord(Interpretation::Instruction(Opcode::PADDQ), OperandCode::G_E_xmm), 0xd5 => OpcodeRecord(Interpretation::Instruction(Opcode::PMULLW), OperandCode::G_E_xmm), - 0xd6 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVQ), OperandCode::E_G_xmm), + 0xd6 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVQ), OperandCode::PMOVX_E_G_xmm), 0xd7 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVMSKB), OperandCode::Gd_U_xmm), 0xd8 => OpcodeRecord(Interpretation::Instruction(Opcode::PSUBUSB), OperandCode::G_E_xmm), 0xd9 => OpcodeRecord(Interpretation::Instruction(Opcode::PSUBUSW), OperandCode::G_E_xmm), @@ -6409,7 +6421,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x14 => OpcodeRecord(Interpretation::Instruction(Opcode::UNPCKLPS), OperandCode::G_E_xmm), 0x15 => OpcodeRecord(Interpretation::Instruction(Opcode::UNPCKHPS), OperandCode::G_E_xmm), 0x16 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f16), - 0x17 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVHPS), OperandCode::M_G_xmm), + 0x17 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVHPS), OperandCode::PMOVX_E_G_xmm), 0x18 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f18), 0x19 => OpcodeRecord(Interpretation::Instruction(Opcode::NOP), OperandCode::Ev), 0x1a => OpcodeRecord(Interpretation::Instruction(Opcode::NOP), OperandCode::Ev), @@ -6433,8 +6445,8 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x2b => OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTPS), OperandCode::M_G_xmm), 0x2c => OpcodeRecord(Interpretation::Instruction(Opcode::CVTTPS2PI), OperandCode::G_mm_E_xmm), 0x2d => OpcodeRecord(Interpretation::Instruction(Opcode::CVTPS2PI), OperandCode::G_mm_E_xmm), - 0x2e => OpcodeRecord(Interpretation::Instruction(Opcode::UCOMISS), OperandCode::G_E_xmm), - 0x2f => OpcodeRecord(Interpretation::Instruction(Opcode::COMISS), OperandCode::G_E_xmm), + 0x2e => OpcodeRecord(Interpretation::Instruction(Opcode::UCOMISS), OperandCode::PMOVX_G_E_xmm), + 0x2f => OpcodeRecord(Interpretation::Instruction(Opcode::COMISS), OperandCode::PMOVX_G_E_xmm), // 0x30 0x30 => OpcodeRecord(Interpretation::Instruction(Opcode::WRMSR), OperandCode::Nothing), 0x31 => OpcodeRecord(Interpretation::Instruction(Opcode::RDTSC), OperandCode::Nothing), @@ -6482,7 +6494,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x57 => OpcodeRecord(Interpretation::Instruction(Opcode::XORPS), OperandCode::G_E_xmm), 0x58 => OpcodeRecord(Interpretation::Instruction(Opcode::ADDPS), OperandCode::G_E_xmm), 0x59 => OpcodeRecord(Interpretation::Instruction(Opcode::MULPS), OperandCode::G_E_xmm), - 0x5a => OpcodeRecord(Interpretation::Instruction(Opcode::CVTPS2PD), OperandCode::G_E_xmm), + 0x5a => OpcodeRecord(Interpretation::Instruction(Opcode::CVTPS2PD), OperandCode::PMOVX_G_E_xmm), 0x5b => OpcodeRecord(Interpretation::Instruction(Opcode::CVTDQ2PS), OperandCode::G_E_xmm), 0x5c => OpcodeRecord(Interpretation::Instruction(Opcode::SUBPS), OperandCode::G_E_xmm), 0x5d => OpcodeRecord(Interpretation::Instruction(Opcode::MINPS), OperandCode::G_E_xmm), @@ -6516,8 +6528,8 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x75 => OpcodeRecord(Interpretation::Instruction(Opcode::PCMPEQW), OperandCode::G_E_mm), 0x76 => OpcodeRecord(Interpretation::Instruction(Opcode::PCMPEQD), OperandCode::G_E_mm), 0x77 => OpcodeRecord(Interpretation::Instruction(Opcode::EMMS), OperandCode::Nothing), - 0x78 => OpcodeRecord(Interpretation::Instruction(Opcode::VMREAD), OperandCode::E_G_d), - 0x79 => OpcodeRecord(Interpretation::Instruction(Opcode::VMWRITE), OperandCode::G_E_d), + 0x78 => OpcodeRecord(Interpretation::Instruction(Opcode::VMREAD), OperandCode::E_G_q), + 0x79 => OpcodeRecord(Interpretation::Instruction(Opcode::VMWRITE), OperandCode::G_E_q), 0x7a => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x7b => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), 0x7c => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -6582,10 +6594,10 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { // 0xb0 0xb0 => OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Eb_Gb), 0xb1 => OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Ev_Gv), - 0xb2 => OpcodeRecord(Interpretation::Instruction(Opcode::LSS), OperandCode::Gv_M), + 0xb2 => OpcodeRecord(Interpretation::Instruction(Opcode::LSS), OperandCode::INV_Gv_M), 0xb3 => OpcodeRecord(Interpretation::Instruction(Opcode::BTR), OperandCode::Ev_Gv), - 0xb4 => OpcodeRecord(Interpretation::Instruction(Opcode::LFS), OperandCode::Gv_M), - 0xb5 => OpcodeRecord(Interpretation::Instruction(Opcode::LGS), OperandCode::Gv_M), + 0xb4 => OpcodeRecord(Interpretation::Instruction(Opcode::LFS), OperandCode::INV_Gv_M), + 0xb5 => OpcodeRecord(Interpretation::Instruction(Opcode::LGS), OperandCode::INV_Gv_M), 0xb6 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_b), OperandCode::Gv_Eb), 0xb7 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_w), OperandCode::Gv_Ew), 0xb8 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // JMPE, ITANIUM @@ -6641,7 +6653,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0xe4 => OpcodeRecord(Interpretation::Instruction(Opcode::PMULHUW), OperandCode::G_E_mm), 0xe5 => OpcodeRecord(Interpretation::Instruction(Opcode::PMULHW), OperandCode::G_E_mm), 0xe6 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), - 0xe7 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTQ), OperandCode::G_Md_mm), + 0xe7 => OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTQ), OperandCode::G_Mq_mm), 0xe8 => OpcodeRecord(Interpretation::Instruction(Opcode::PSUBSB), OperandCode::G_E_mm), 0xe9 => OpcodeRecord(Interpretation::Instruction(Opcode::PSUBSW), OperandCode::G_E_mm), 0xea => OpcodeRecord(Interpretation::Instruction(Opcode::PMINSW), OperandCode::G_E_mm), @@ -6682,7 +6694,7 @@ fn read_0f38_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0xf6 => OpcodeRecord(Interpretation::Instruction(Opcode::ADOX), OperandCode::Gv_Ev), 0xf8 => { prefixes.unset_operand_size(); - OpcodeRecord(Interpretation::Instruction(Opcode::ENQCMDS), OperandCode::Gv_M) + OpcodeRecord(Interpretation::Instruction(Opcode::ENQCMDS), OperandCode::INV_Gv_M) }, 0xfa => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xf30f38fa), 0xfb => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xf30f38fb), @@ -6696,7 +6708,7 @@ fn read_0f38_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0xf1 => OpcodeRecord(Interpretation::Instruction(Opcode::CRC32), OperandCode::Gd_Ev), 0xf8 => { prefixes.unset_operand_size(); - OpcodeRecord(Interpretation::Instruction(Opcode::ENQCMD), OperandCode::Gv_M) + OpcodeRecord(Interpretation::Instruction(Opcode::ENQCMD), OperandCode::INV_Gv_M) }, _ => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), }; @@ -6728,22 +6740,22 @@ fn read_0f38_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x1c => OpcodeRecord(Interpretation::Instruction(Opcode::PABSB), OperandCode::G_E_xmm), 0x1d => OpcodeRecord(Interpretation::Instruction(Opcode::PABSW), OperandCode::G_E_xmm), 0x1e => OpcodeRecord(Interpretation::Instruction(Opcode::PABSD), OperandCode::G_E_xmm), - 0x20 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXBW), OperandCode::G_E_xmm), - 0x21 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXBD), OperandCode::G_E_xmm), - 0x22 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXBQ), OperandCode::G_E_xmm), - 0x23 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXWD), OperandCode::G_E_xmm), - 0x24 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXWQ), OperandCode::G_E_xmm), - 0x25 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXDQ), OperandCode::G_E_xmm), + 0x20 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXBW), OperandCode::PMOVX_G_E_xmm), + 0x21 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXBD), OperandCode::PMOVX_G_E_xmm), + 0x22 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXBQ), OperandCode::PMOVX_G_E_xmm), + 0x23 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXWD), OperandCode::PMOVX_G_E_xmm), + 0x24 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXWQ), OperandCode::PMOVX_G_E_xmm), + 0x25 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVSXDQ), OperandCode::PMOVX_G_E_xmm), 0x28 => OpcodeRecord(Interpretation::Instruction(Opcode::PMULDQ), OperandCode::G_E_xmm), 0x29 => OpcodeRecord(Interpretation::Instruction(Opcode::PCMPEQQ), OperandCode::G_E_xmm), 0x2a => OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTDQA), OperandCode::G_M_xmm), 0x2b => OpcodeRecord(Interpretation::Instruction(Opcode::PACKUSDW), OperandCode::G_E_xmm), - 0x30 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXBW), OperandCode::G_E_xmm), - 0x31 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXBD), OperandCode::G_E_xmm), - 0x32 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXBQ), OperandCode::G_E_xmm), - 0x33 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXWD), OperandCode::G_E_xmm), - 0x34 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXWQ), OperandCode::G_E_xmm), - 0x35 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXDQ), OperandCode::G_E_xmm), + 0x30 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXBW), OperandCode::PMOVX_G_E_xmm), + 0x31 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXBD), OperandCode::PMOVX_G_E_xmm), + 0x32 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXBQ), OperandCode::PMOVX_G_E_xmm), + 0x33 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXWD), OperandCode::PMOVX_G_E_xmm), + 0x34 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXWQ), OperandCode::PMOVX_G_E_xmm), + 0x35 => OpcodeRecord(Interpretation::Instruction(Opcode::PMOVZXDQ), OperandCode::PMOVX_G_E_xmm), 0x37 => OpcodeRecord(Interpretation::Instruction(Opcode::PCMPGTQ), OperandCode::G_E_xmm), 0x38 => OpcodeRecord(Interpretation::Instruction(Opcode::PMINSB), OperandCode::G_E_xmm), 0x39 => OpcodeRecord(Interpretation::Instruction(Opcode::PMINSD), OperandCode::G_E_xmm), @@ -6755,9 +6767,9 @@ fn read_0f38_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x3f => OpcodeRecord(Interpretation::Instruction(Opcode::PMAXUD), OperandCode::G_E_xmm), 0x40 => OpcodeRecord(Interpretation::Instruction(Opcode::PMULLD), OperandCode::G_E_xmm), 0x41 => OpcodeRecord(Interpretation::Instruction(Opcode::PHMINPOSUW), OperandCode::G_E_xmm), - 0x80 => OpcodeRecord(Interpretation::Instruction(Opcode::INVEPT), OperandCode::Gv_M), - 0x81 => OpcodeRecord(Interpretation::Instruction(Opcode::INVVPID), OperandCode::Gv_M), - 0x82 => OpcodeRecord(Interpretation::Instruction(Opcode::INVPCID), OperandCode::Gv_M), + 0x80 => OpcodeRecord(Interpretation::Instruction(Opcode::INVEPT), OperandCode::INV_Gv_M), + 0x81 => OpcodeRecord(Interpretation::Instruction(Opcode::INVVPID), OperandCode::INV_Gv_M), + 0x82 => OpcodeRecord(Interpretation::Instruction(Opcode::INVPCID), OperandCode::INV_Gv_M), 0xcf => OpcodeRecord(Interpretation::Instruction(Opcode::GF2P8MULB), OperandCode::G_E_xmm), 0xdb => OpcodeRecord(Interpretation::Instruction(Opcode::AESIMC), OperandCode::G_E_xmm), 0xdc => OpcodeRecord(Interpretation::Instruction(Opcode::AESENC), OperandCode::G_E_xmm), @@ -6818,13 +6830,13 @@ fn read_0f3a_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord { 0x0d => OpcodeRecord(Interpretation::Instruction(Opcode::BLENDPD), OperandCode::G_E_xmm_Ib), 0x0e => OpcodeRecord(Interpretation::Instruction(Opcode::PBLENDW), OperandCode::G_E_xmm_Ib), 0x0f => OpcodeRecord(Interpretation::Instruction(Opcode::PALIGNR), OperandCode::G_E_xmm_Ib), - 0x14 => OpcodeRecord(Interpretation::Instruction(Opcode::PEXTRB), OperandCode::G_E_xmm_Ib), - 0x15 => OpcodeRecord(Interpretation::Instruction(Opcode::PEXTRW), OperandCode::G_E_xmm_Ib), - 0x16 => OpcodeRecord(Interpretation::Instruction(Opcode::PEXTRD), OperandCode::G_E_xmm_Ib), - 0x17 => OpcodeRecord(Interpretation::Instruction(Opcode::EXTRACTPS), OperandCode::G_E_xmm_Ib), - 0x20 => OpcodeRecord(Interpretation::Instruction(Opcode::PINSRB), OperandCode::G_E_xmm_Ib), - 0x21 => OpcodeRecord(Interpretation::Instruction(Opcode::INSERTPS), OperandCode::G_E_xmm_Ib), - 0x22 => OpcodeRecord(Interpretation::Instruction(Opcode::PINSRD), OperandCode::G_E_xmm_Ib), + 0x14 => OpcodeRecord(Interpretation::Instruction(Opcode::PEXTRB), OperandCode::G_Ev_xmm_Ib), + 0x15 => OpcodeRecord(Interpretation::Instruction(Opcode::PEXTRW), OperandCode::G_Ev_xmm_Ib), + 0x16 => OpcodeRecord(Interpretation::Instruction(Opcode::PEXTRD), OperandCode::G_Ev_xmm_Ib), + 0x17 => OpcodeRecord(Interpretation::Instruction(Opcode::EXTRACTPS), OperandCode::G_Ev_xmm_Ib), + 0x20 => OpcodeRecord(Interpretation::Instruction(Opcode::PINSRB), OperandCode::G_Ev_xmm_Ib), + 0x21 => OpcodeRecord(Interpretation::Instruction(Opcode::INSERTPS), OperandCode::G_Ev_xmm_Ib), + 0x22 => OpcodeRecord(Interpretation::Instruction(Opcode::PINSRD), OperandCode::G_Ev_xmm_Ib), 0x40 => OpcodeRecord(Interpretation::Instruction(Opcode::DPPS), OperandCode::G_E_xmm_Ib), 0x41 => OpcodeRecord(Interpretation::Instruction(Opcode::DPPD), OperandCode::G_E_xmm_Ib), 0x42 => OpcodeRecord(Interpretation::Instruction(Opcode::MPSADBW), OperandCode::G_E_xmm_Ib), @@ -7286,6 +7298,12 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, } else if opcode == Opcode::CALLF || opcode == Opcode::JMPF { return Err(DecodeError::InvalidOperand); } + } else { + if opcode == Opcode::CALL || opcode == Opcode::JMP || opcode == Opcode::PUSH || opcode == Opcode::POP { + instruction.mem_size = 4; + } else if opcode == Opcode::CALLF || opcode == Opcode::JMPF { + instruction.mem_size = 5; + } } instruction.opcode = opcode; instruction.operand_count = 1; @@ -7299,6 +7317,9 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, } else { RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::D) }; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = 1; + } instruction.operand_count = 2; }, 16 => { @@ -7310,6 +7331,9 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, } else { RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::D) }; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = 2; + } instruction.operand_count = 2; }, 18 => { @@ -7324,6 +7348,8 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, if instruction.operands[0] == OperandSpec::RegMMM { // fix the register to XMM instruction.modrm_mmm.bank = RegisterBank::X; + } else { + instruction.mem_size = 16; } }, op @ 20 | @@ -7338,6 +7364,12 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, // fix the register to XMM instruction.modrm_mmm.bank = RegisterBank::X; } + } else { + if instruction.opcode == Opcode::MOVDDUP { + instruction.mem_size = 8; + } else { + instruction.mem_size = 16; + } } }, 22 => { @@ -7349,6 +7381,15 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, instruction.imm = read_num(&mut bytes_iter, 1)? as u8 as u32; *length += 1; + if instruction.operands[1] != OperandSpec::RegMMM { + if instruction.opcode == Opcode::CMPSS { + instruction.mem_size = 4; + } else if instruction.opcode == Opcode::CMPSD { + instruction.mem_size = 8; + } else { + instruction.mem_size = 16; + } + } instruction.operands[2] = OperandSpec::ImmI8; instruction.operand_count = 3; }, @@ -7409,12 +7450,20 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, return Ok(()); }, 29 => { - instruction.modrm_rrr = RegSpec { bank: RegisterBank::MM, num: (modrm >> 3) & 7 }; - if instruction.operands[1] == OperandSpec::RegMMM { - instruction.modrm_mmm.bank = RegisterBank::MM; + instruction.modrm_rrr.bank = RegisterBank::X; + instruction.operands[0] = mem_oper; + instruction.operands[1] = OperandSpec::RegRRR; + instruction.operand_count = 2; + if instruction.operands[0] == OperandSpec::RegMMM { + // fix the register to XMM + if instruction.opcode == Opcode::MOVD { + instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.modrm_mmm.bank = RegisterBank::X; + } + } else { + instruction.mem_size = 4; } - instruction.operands[2] = OperandSpec::ImmI8; - instruction.operand_count = 3; }, 30 => { instruction.operands[0] = mem_oper; @@ -7427,6 +7476,16 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, ][r as usize]; instruction.operand_count = 1; } + 31 => { + instruction.modrm_rrr.bank = RegisterBank::X; + instruction.operand_count = 2; + if instruction.operands[1] == OperandSpec::RegMMM { + // fix the register to XMM + instruction.modrm_mmm.bank = RegisterBank::X; + } else { + instruction.mem_size = 4; + } + }, _ => { let operand_code: OperandCode = unsafe { core::mem::transmute(operand_code.bits()) }; unlikely_operands(decoder, bytes_iter, instruction, operand_code, mem_oper, length)?; @@ -7438,6 +7497,103 @@ fn read_operands>(decoder: &InstDecoder, mut bytes_iter: T, } fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter: T, instruction: &mut Instruction, operand_code: OperandCode, mem_oper: OperandSpec, length: &mut u8) -> Result<(), DecodeError> { match operand_code { + OperandCode::G_E_mm_Ib => { + let modrm = read_modrm(&mut bytes_iter, length)?; + + instruction.operands[1] = read_E_mm(&mut bytes_iter, instruction, modrm, length)?; + instruction.modrm_rrr = RegSpec { bank: RegisterBank::MM, num: (modrm >> 3) & 7 }; + if instruction.operands[1] == OperandSpec::RegMMM { + instruction.modrm_mmm.bank = RegisterBank::MM; + } else { + instruction.mem_size = 8; + } + instruction.imm = read_num(&mut bytes_iter, 1)? as u8 as u32; + *length += 1; + instruction.operands[2] = OperandSpec::ImmI8; + instruction.operand_count = 3; + } + OperandCode::G_Ev_xmm_Ib => { + let modrm = read_modrm(&mut bytes_iter, length)?; + + instruction.operands[1] = read_E_xmm(&mut bytes_iter, instruction, modrm, length)?; + instruction.modrm_rrr = RegSpec { bank: RegisterBank::X, num: (modrm >> 3) & 7 }; + instruction.imm = read_num(&mut bytes_iter, 1)? as u8 as u32; + *length += 1; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = match instruction.opcode { + Opcode::PEXTRB => 1, + Opcode::PEXTRW => 2, + Opcode::PEXTRD => 4, + Opcode::EXTRACTPS => 4, + Opcode::INSERTPS => 4, + Opcode::PINSRB => 1, + Opcode::PINSRW => 2, + Opcode::PINSRD => 4, + _ => 8, + }; + } + instruction.operands[2] = OperandSpec::ImmI8; + instruction.operand_count = 3; + } + OperandCode::PMOVX_E_G_xmm => { + let modrm = read_modrm(&mut bytes_iter, length)?; + + instruction.modrm_rrr = RegSpec { bank: RegisterBank::X, num: (modrm >> 3) & 7 }; + instruction.operands[1] = OperandSpec::RegRRR; + instruction.operands[0] = read_E_xmm(&mut bytes_iter, instruction, modrm, length)?; + if instruction.operands[0] != OperandSpec::RegMMM { + if [].contains(&instruction.opcode) { + instruction.mem_size = 2; + } else { + instruction.mem_size = 8; + } + } else { + if instruction.opcode == Opcode::MOVLPD || instruction.opcode == Opcode::MOVHPD || instruction.opcode == Opcode::MOVHPS { + return Err(DecodeError::InvalidOperand); + } + } + } + OperandCode::PMOVX_G_E_xmm => { + let modrm = read_modrm(&mut bytes_iter, length)?; + + instruction.modrm_rrr = RegSpec { bank: RegisterBank::X, num: (modrm >> 3) & 7 }; + instruction.operands[0] = OperandSpec::RegRRR; + instruction.operands[1] = read_E_xmm(&mut bytes_iter, instruction, modrm, length)?; + if instruction.operands[1] != OperandSpec::RegMMM { + if [Opcode::PMOVSXBQ, Opcode::PMOVZXBQ].contains(&instruction.opcode) { + instruction.mem_size = 2; + } else if [Opcode::PMOVZXBD, Opcode::UCOMISS, Opcode::COMISS, Opcode::CVTSS2SD].contains(&instruction.opcode) { + instruction.mem_size = 4; + } else { + instruction.mem_size = 8; + } + } else { + if instruction.opcode == Opcode::MOVLPD || instruction.opcode == Opcode::MOVHPD { + return Err(DecodeError::InvalidOperand); + } + } + } + OperandCode::INV_Gv_M => { + let modrm = read_modrm(&mut bytes_iter, length)?; + + instruction.modrm_rrr = RegSpec { bank: RegisterBank::D, num: (modrm >> 3) & 7 }; + instruction.operands[0] = OperandSpec::RegRRR; + instruction.operands[1] = read_M(&mut bytes_iter, instruction, modrm, length)?; + if instruction.operands[1] == OperandSpec::RegMMM { + return Err(DecodeError::InvalidOperand); + } + if [Opcode::LFS, Opcode::LGS, Opcode::LSS].contains(&instruction.opcode) { + if instruction.prefixes.vex().w() { + instruction.mem_size = 6; + } else { + instruction.mem_size = 4; + } + } else if [Opcode::ENQCMD, Opcode::ENQCMDS].contains(&instruction.opcode) { + instruction.mem_size = 64; + } else { + instruction.mem_size = 16; + } + } OperandCode::ModRM_0xc4 => { let modrm = bytes_iter.next().ok_or(DecodeError::ExhaustedInput).map(|b| { *length += 1; b })?; if modrm & 0b11000000 == 0b11000000 { @@ -7560,6 +7716,9 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.imm = read_num(&mut bytes_iter, 1)? as u8 as u32; *length += 1; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = 16; + } instruction.operands[2] = OperandSpec::ImmU8; instruction.operand_count = 3; } @@ -7588,7 +7747,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_mmm.bank = RegisterBank::X; instruction.operand_count = 2; }, - OperandCode::Gb_Eb_Ib => { + OperandCode::Gv_Ev_Ib => { instruction.operands[2] = OperandSpec::ImmI8; instruction.operand_count = 3; } @@ -7630,6 +7789,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::MM); if instruction.operands[1] == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.mem_size = 2; } instruction.imm = read_num(&mut bytes_iter, 1)? as u8 as u32; @@ -7643,6 +7804,12 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::MM; instruction.modrm_mmm.num &= 0b111; + } else { + if [Opcode::PACKSSWB, Opcode::PCMPGTB, Opcode::PCMPGTW, Opcode::PCMPGTD, Opcode::PACKUSWB, Opcode::PUNPCKHBW, Opcode::PUNPCKHWD, Opcode::PUNPCKHDQ, Opcode::PACKSSDW, Opcode::PSRLW, Opcode::PMULHW, Opcode::PSHUFB, Opcode::PHADDW, Opcode::PHADDD, Opcode::PHADDSW, Opcode::PMADDUBSW, Opcode::PHSUBW, Opcode::PHSUBD, Opcode::PHSUBSW, Opcode::PSIGNB, Opcode::PSIGNW, Opcode::PSIGND, Opcode::PMULHRSW, Opcode::PABSB, Opcode::PABSW, Opcode::PABSD].contains(&instruction.opcode) { + instruction.mem_size = 8; + } else { + instruction.mem_size = 4; + } } instruction.operand_count = 2; }, @@ -7684,15 +7851,23 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr = RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::D); instruction.operand_count = 2; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = opwidth; + } }, op @ OperandCode::AL_Ob | op @ OperandCode::AX_Ov => { instruction.modrm_rrr = match op { - OperandCode::AL_Ob => RegSpec::al(), + OperandCode::AL_Ob => { + instruction.mem_size = 1; + RegSpec::al() + }, OperandCode::AX_Ov => { if instruction.prefixes.operand_size() { + instruction.mem_size = 2; RegSpec::ax() } else { + instruction.mem_size = 4; RegSpec::eax() } } @@ -7714,11 +7889,16 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter op @ OperandCode::Ob_AL | op @ OperandCode::Ov_AX => { instruction.modrm_rrr = match op { - OperandCode::Ob_AL => RegSpec::al(), + OperandCode::Ob_AL => { + instruction.mem_size = 1; + RegSpec::al() + }, OperandCode::Ov_AX => { if instruction.prefixes.operand_size() { + instruction.mem_size = 2; RegSpec::ax() } else { + instruction.mem_size = 4; RegSpec::eax() } } @@ -7774,7 +7954,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr.num &= 0b111; instruction.operand_count = 2; }, - OperandCode::E_G_d => { + OperandCode::E_G_q => { if instruction.prefixes.operand_size() { return Err(DecodeError::InvalidOpcode); } @@ -7786,8 +7966,11 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr = RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::D); instruction.operand_count = 2; + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 8; + } } - OperandCode::G_E_d => { + OperandCode::G_E_q => { if instruction.prefixes.operand_size() { return Err(DecodeError::InvalidOpcode); } @@ -7798,14 +7981,19 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr = RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::D); instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 8; + } instruction.operand_count = 2; } - OperandCode::G_Md_mm => { + OperandCode::G_Mq_mm => { instruction.operands[1] = instruction.operands[0]; instruction.operands[0] = mem_oper; instruction.modrm_rrr.bank = RegisterBank::MM; if mem_oper == OperandSpec::RegMMM { return Err(DecodeError::InvalidOperand); + } else { + instruction.mem_size = 8; } instruction.modrm_rrr.num &= 0b111; instruction.operand_count = 2; @@ -7836,6 +8024,9 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } } instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, opwidth, length)?; + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 64; + } instruction.operand_count = 1; } OperandCode::ModRM_0x0f0f => { @@ -7846,6 +8037,9 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.operands[1] = read_E_mm(&mut bytes_iter, instruction, modrm, length)?; instruction.operands[0] = OperandSpec::RegRRR; instruction.modrm_rrr = RegSpec { bank: RegisterBank::MM, num: (modrm >> 3) & 7 }; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = 8; + } let opcode = read_modrm(&mut bytes_iter, length)?; match opcode { @@ -7939,6 +8133,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter return Err(DecodeError::InvalidOperand); } else { instruction.opcode = Opcode::CMPXCHG8B; + instruction.mem_size = 8; instruction.operand_count = 1; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; } @@ -7966,6 +8161,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter return Err(DecodeError::InvalidOperand); } else { instruction.opcode = Opcode::CMPXCHG8B; + instruction.mem_size = 8; instruction.operand_count = 1; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; } @@ -7980,6 +8176,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter // word-form operand: instruction.modrm_mmm = RegSpec { bank: RegisterBank::W, num: instruction.modrm_mmm.num }; instruction.opcode = Opcode::RDRAND; + } else { + instruction.mem_size = 8; } instruction.operand_count = 1; return Ok(()); @@ -8021,6 +8219,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter return Err(DecodeError::InvalidOperand); } else { instruction.opcode = Opcode::CMPXCHG8B; + instruction.mem_size = 8; instruction.operand_count = 1; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; } @@ -8033,6 +8232,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.opcode = Opcode::SENDUIPI; // and the operand is always a dword register instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.mem_size = 8; } instruction.operand_count = 1; } @@ -8062,6 +8263,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOperand); } else { + instruction.mem_size = 8; Opcode::CMPXCHG8B } } @@ -8070,6 +8272,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOperand); } else { + instruction.mem_size = 63; Opcode::XRSTORS } } @@ -8078,6 +8281,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOperand); } else { + instruction.mem_size = 63; Opcode::XSAVEC } } @@ -8086,6 +8290,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOperand); } else { + instruction.mem_size = 63; Opcode::XSAVES } } @@ -8093,6 +8298,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter if is_reg { Opcode::RDRAND } else { + instruction.mem_size = 8; Opcode::VMPTRLD } } @@ -8100,6 +8306,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter if is_reg { Opcode::RDSEED } else { + instruction.mem_size = 8; Opcode::VMPTRST } } @@ -8324,6 +8531,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr.num &= 0b111; if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.mem_size = 4; } } OperandCode::G_mm_E => { @@ -8332,6 +8541,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::MM; instruction.modrm_mmm.num &= 0b111; + } else { + instruction.mem_size = 8; } } OperandCode::Ed_G_mm => { @@ -8341,14 +8552,18 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr.num &= 0b111; if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.mem_size = 4; } } OperandCode::Ed_G_xmm => { instruction.operands[1] = instruction.operands[0]; instruction.operands[0] = mem_oper; - instruction.modrm_rrr.bank = RegisterBank::X; + instruction.modrm_rrr.bank = RegisterBank::Y; if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.mem_size = 4; } } OperandCode::E_G_mm => { @@ -8359,9 +8574,11 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::MM; instruction.modrm_mmm.num &= 0b111; + } else { + instruction.mem_size = 8; } } - OperandCode::G_xmm_Ed_Ib => { + OperandCode::G_xmm_Ew_Ib => { instruction.operands[2] = OperandSpec::ImmU8; instruction.operand_count = 3; instruction.imm = @@ -8370,12 +8587,16 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr.bank = RegisterBank::X; if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.mem_size = 2; } }, OperandCode::G_xmm_Ed => { instruction.modrm_rrr.bank = RegisterBank::X; if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::D; + } else { + instruction.mem_size = 4; } }, OperandCode::G_mm_E_xmm => { @@ -8383,6 +8604,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr.num &= 0b111; if mem_oper == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::X; + } else { + instruction.mem_size = 16; } }, op @ OperandCode::G_xmm_U_mm | @@ -8394,6 +8617,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } else { if op == OperandCode::G_xmm_U_mm { return Err(DecodeError::InvalidOperand); + } else { + instruction.mem_size = 8; } } }, @@ -8479,10 +8704,18 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.modrm_rrr.bank = RegisterBank::X; instruction.operands[1] = mem_oper; if instruction.operands[1] == OperandSpec::RegMMM { + if instruction.prefixes.operand_size() { + return Err(DecodeError::InvalidOpcode); + } instruction.modrm_mmm.bank = RegisterBank::X; instruction.opcode = Opcode::MOVHLPS; } else { - instruction.opcode = Opcode::MOVLPS; + instruction.mem_size = 8; + if instruction.prefixes.operand_size() { + instruction.opcode = Opcode::MOVLPD; + } else { + instruction.opcode = Opcode::MOVLPS; + } } } OperandCode::ModRM_0x0f16 => { @@ -8495,6 +8728,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } instruction.opcode = Opcode::MOVLHPS; } else { + instruction.mem_size = 8; if instruction.prefixes.operand_size() { instruction.opcode = Opcode::MOVHPD; } else { @@ -8517,6 +8751,9 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter _ => Opcode::NOP, } }; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 64; + } } OperandCode::Gd_U_xmm => { if instruction.operands[1] != OperandSpec::RegMMM { @@ -8529,6 +8766,8 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter OperandCode::Gv_E_xmm => { if instruction.operands[1] == OperandSpec::RegMMM { instruction.modrm_mmm.bank = RegisterBank::X; + } else { + instruction.mem_size = 4; } } OperandCode::M_G_xmm => { @@ -8537,6 +8776,14 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter if instruction.operands[0] == OperandSpec::RegMMM { instruction.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOperand); + } else { + if instruction.opcode == Opcode::MOVNTSS { + instruction.mem_size = 4; + } else if instruction.opcode == Opcode::MOVNTPD || instruction.opcode == Opcode::MOVNTDQ || instruction.opcode == Opcode::MOVNTPS { + instruction.mem_size = 16; + } else { + instruction.mem_size = 8; + } } instruction.modrm_rrr.bank = RegisterBank::X; } @@ -8547,6 +8794,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter RegSpec { bank: RegisterBank::W, num: (modrm >> 3) & 7 }; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 2, length)?; instruction.operands[1] = OperandSpec::RegRRR; + instruction.mem_size = 2; instruction.operand_count = 2; }, OperandCode::Ew_Sw => { @@ -8571,6 +8819,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.operands[0] = OperandSpec::RegMMM; } else { instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, opwidth, length)?; + instruction.mem_size = 2; } }, OperandCode::Sw_Ew => { @@ -8604,6 +8853,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.operands[1] = OperandSpec::RegMMM; } else { instruction.operands[1] = read_M(&mut bytes_iter, instruction, modrm, length)?; + instruction.mem_size = 2; } }, OperandCode::CVT_AA => { @@ -8704,6 +8954,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } else { instruction.opcode = Opcode::SGDT; instruction.operand_count = 1; + instruction.mem_size = 63; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, opwidth, length)?; } } else if r == 1 { @@ -8760,6 +9011,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } else { instruction.opcode = Opcode::SIDT; instruction.operand_count = 1; + instruction.mem_size = 63; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, opwidth, length)?; } } else if r == 2 { @@ -8795,6 +9047,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } else { instruction.opcode = Opcode::LGDT; instruction.operand_count = 1; + instruction.mem_size = 63; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, opwidth, length)?; } } else if r == 3 { @@ -8859,6 +9112,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } else { instruction.opcode = Opcode::LIDT; instruction.operand_count = 1; + instruction.mem_size = 63; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, opwidth, length)?; } } else if r == 4 { @@ -8866,6 +9120,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter // spec suggets this might do something different for f.ex rdi? instruction.opcode = Opcode::SMSW; instruction.operand_count = 1; + instruction.mem_size = 2; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 2, length)?; } else if r == 5 { let mod_bits = modrm >> 6; @@ -8875,6 +9130,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } instruction.opcode = Opcode::RSTORSSP; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + instruction.mem_size = 8; instruction.operand_count = 1; return Ok(()); } @@ -8976,6 +9232,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } else if r == 6 { instruction.opcode = Opcode::LMSW; instruction.operand_count = 1; + instruction.mem_size = 2; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 2, length)?; } else if r == 7 { let mod_bits = modrm >> 6; @@ -9025,6 +9282,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } else { instruction.opcode = Opcode::INVLPG; instruction.operand_count = 1; + instruction.mem_size = 1; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, opwidth, length)?; } } else { @@ -9052,6 +9310,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } }; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 1 /* opwidth */, length)?; + instruction.mem_size = 64; instruction.operand_count = 1; } else { instruction.opcode = match (modrm >> 3) & 7 { @@ -9100,6 +9359,9 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter } instruction.opcode = Opcode::PTWRITE; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 4; + } instruction.operand_count = 1; return Ok(()); } @@ -9154,6 +9416,7 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter instruction.opcode = Opcode::CLRSSBSY; instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; instruction.operand_count = 1; + instruction.mem_size = 8; return Ok(()); } _ => { @@ -9215,16 +9478,18 @@ fn unlikely_operands>(decoder: &InstDecoder, mut bytes_iter return Err(DecodeError::InvalidOperand); } instruction.operand_count = 1; - instruction.opcode = [ - Opcode::FXSAVE, - Opcode::FXRSTOR, - Opcode::LDMXCSR, - Opcode::STMXCSR, - Opcode::XSAVE, - Opcode::XRSTOR, - Opcode::XSAVEOPT, - Opcode::CLFLUSH, + let (opcode, mem_size) = [ + (Opcode::FXSAVE, 63), + (Opcode::FXRSTOR, 63), + (Opcode::LDMXCSR, 4), + (Opcode::STMXCSR, 4), + (Opcode::XSAVE, 63), + (Opcode::XRSTOR, 63), + (Opcode::XSAVEOPT, 63), + (Opcode::CLFLUSH, 64), ][r as usize]; + instruction.opcode = opcode; + instruction.mem_size = mem_size; instruction.operands[0] = read_M(&mut bytes_iter, instruction, modrm, length)?; } }, @@ -9508,13 +9773,22 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i enum OperandCodeX87 { Est, St_Est, + St_Edst, + St_Eqst, St_Ew, + St_Mw, St_Md, - Md, + St_Mq, + St_Mm, Ew, Est_St, + Edst_St, + Eqst_St, Ed_St, + Mw_St, Md_St, + Mq_St, + Mm_St, Ex87S, Nothing, } @@ -9526,20 +9800,20 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i let (opcode, x87_operands) = match operand_code { OperandCode::x87_d8 => { match r { - 0 => (Opcode::FADD, OperandCodeX87::St_Est), - 1 => (Opcode::FMUL, OperandCodeX87::St_Est), - 2 => (Opcode::FCOM, OperandCodeX87::St_Est), - 3 => (Opcode::FCOMP, OperandCodeX87::St_Est), - 4 => (Opcode::FSUB, OperandCodeX87::St_Est), - 5 => (Opcode::FSUBR, OperandCodeX87::St_Est), - 6 => (Opcode::FDIV, OperandCodeX87::St_Est), - 7 => (Opcode::FDIVR, OperandCodeX87::St_Est), + 0 => (Opcode::FADD, OperandCodeX87::St_Edst), + 1 => (Opcode::FMUL, OperandCodeX87::St_Edst), + 2 => (Opcode::FCOM, OperandCodeX87::St_Edst), + 3 => (Opcode::FCOMP, OperandCodeX87::St_Edst), + 4 => (Opcode::FSUB, OperandCodeX87::St_Edst), + 5 => (Opcode::FSUBR, OperandCodeX87::St_Edst), + 6 => (Opcode::FDIV, OperandCodeX87::St_Edst), + 7 => (Opcode::FDIVR, OperandCodeX87::St_Edst), _ => { unreachable!("impossible r"); } } } OperandCode::x87_d9 => { match r { - 0 => (Opcode::FLD, OperandCodeX87::St_Est), + 0 => (Opcode::FLD, OperandCodeX87::St_Edst), 1 => { if modrm >= 0xc0 { (Opcode::FXCH, OperandCodeX87::St_Est) @@ -9562,7 +9836,7 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i if modrm >= 0xc0 { (Opcode::FSTPNCE, OperandCodeX87::Est_St) } else { - (Opcode::FSTP, OperandCodeX87::Est_St) + (Opcode::FSTP, OperandCodeX87::Edst_St) } }, 4 => { @@ -9696,8 +9970,8 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i 1 => (Opcode::FISTTP, OperandCodeX87::Md_St), 2 => (Opcode::FIST, OperandCodeX87::Md_St), 3 => (Opcode::FISTP, OperandCodeX87::Md_St), - 5 => (Opcode::FLD, OperandCodeX87::St_Md), // 80bit - 7 => (Opcode::FSTP, OperandCodeX87::Md_St), // 80bit + 5 => (Opcode::FLD, OperandCodeX87::St_Mm), // 80bit + 7 => (Opcode::FSTP, OperandCodeX87::Mm_St), // 80bit _ => { return Err(DecodeError::InvalidOpcode); } @@ -9709,26 +9983,26 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i // mod=11 swaps operand order for some instructions if modrm >= 0xc0 { match r { - 0 => (Opcode::FADD, OperandCodeX87::Est_St), - 1 => (Opcode::FMUL, OperandCodeX87::Est_St), - 2 => (Opcode::FCOM, OperandCodeX87::St_Est), - 3 => (Opcode::FCOMP, OperandCodeX87::St_Est), - 4 => (Opcode::FSUBR, OperandCodeX87::Est_St), - 5 => (Opcode::FSUB, OperandCodeX87::Est_St), - 6 => (Opcode::FDIVR, OperandCodeX87::Est_St), - 7 => (Opcode::FDIV, OperandCodeX87::Est_St), + 0 => (Opcode::FADD, OperandCodeX87::Eqst_St), + 1 => (Opcode::FMUL, OperandCodeX87::Eqst_St), + 2 => (Opcode::FCOM, OperandCodeX87::St_Eqst), + 3 => (Opcode::FCOMP, OperandCodeX87::St_Eqst), + 4 => (Opcode::FSUBR, OperandCodeX87::Eqst_St), + 5 => (Opcode::FSUB, OperandCodeX87::Eqst_St), + 6 => (Opcode::FDIVR, OperandCodeX87::Eqst_St), + 7 => (Opcode::FDIV, OperandCodeX87::Eqst_St), _ => { unreachable!("impossible r"); } } } else { match r { - 0 => (Opcode::FADD, OperandCodeX87::St_Est), - 1 => (Opcode::FMUL, OperandCodeX87::St_Est), - 2 => (Opcode::FCOM, OperandCodeX87::St_Est), - 3 => (Opcode::FCOMP, OperandCodeX87::St_Est), - 4 => (Opcode::FSUB, OperandCodeX87::St_Est), - 5 => (Opcode::FSUBR, OperandCodeX87::St_Est), - 6 => (Opcode::FDIV, OperandCodeX87::St_Est), - 7 => (Opcode::FDIVR, OperandCodeX87::St_Est), + 0 => (Opcode::FADD, OperandCodeX87::St_Eqst), + 1 => (Opcode::FMUL, OperandCodeX87::St_Eqst), + 2 => (Opcode::FCOM, OperandCodeX87::St_Eqst), + 3 => (Opcode::FCOMP, OperandCodeX87::St_Eqst), + 4 => (Opcode::FSUB, OperandCodeX87::St_Eqst), + 5 => (Opcode::FSUBR, OperandCodeX87::St_Eqst), + 6 => (Opcode::FDIV, OperandCodeX87::St_Eqst), + 7 => (Opcode::FDIVR, OperandCodeX87::St_Eqst), _ => { unreachable!("impossible r"); } } } @@ -9748,13 +10022,13 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i } } else { match r { - 0 => (Opcode::FLD, OperandCodeX87::St_Est), - 1 => (Opcode::FISTTP, OperandCodeX87::Est_St), - 2 => (Opcode::FST, OperandCodeX87::Est_St), - 3 => (Opcode::FSTP, OperandCodeX87::Est_St), - 4 => (Opcode::FRSTOR, OperandCodeX87::Md), // TODO: m94/108byte + 0 => (Opcode::FLD, OperandCodeX87::St_Eqst), + 1 => (Opcode::FISTTP, OperandCodeX87::Eqst_St), + 2 => (Opcode::FST, OperandCodeX87::Eqst_St), + 3 => (Opcode::FSTP, OperandCodeX87::Eqst_St), + 4 => (Opcode::FRSTOR, OperandCodeX87::Ex87S), 5 => (Opcode::Invalid, OperandCodeX87::Nothing), - 6 => (Opcode::FNSAVE, OperandCodeX87::Est), + 6 => (Opcode::FNSAVE, OperandCodeX87::Ex87S), 7 => (Opcode::FNSTSW, OperandCodeX87::Ew), _ => { unreachable!("impossible r"); } } @@ -9818,14 +10092,14 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i } } else { match r { - 0 => (Opcode::FILD, OperandCodeX87::St_Est), - 1 => (Opcode::FISTTP, OperandCodeX87::Est_St), - 2 => (Opcode::FIST, OperandCodeX87::Est_St), - 3 => (Opcode::FISTP, OperandCodeX87::Est_St), - 4 => (Opcode::FBLD, OperandCodeX87::St_Est), - 5 => (Opcode::FILD, OperandCodeX87::St_Est), - 6 => (Opcode::FBSTP, OperandCodeX87::Est_St), - 7 => (Opcode::FISTP, OperandCodeX87::Est_St), + 0 => (Opcode::FILD, OperandCodeX87::St_Mw), + 1 => (Opcode::FISTTP, OperandCodeX87::Mw_St), + 2 => (Opcode::FIST, OperandCodeX87::Mw_St), + 3 => (Opcode::FISTP, OperandCodeX87::Mw_St), + 4 => (Opcode::FBLD, OperandCodeX87::St_Mm), + 5 => (Opcode::FILD, OperandCodeX87::St_Mq), + 6 => (Opcode::FBSTP, OperandCodeX87::Mm_St), + 7 => (Opcode::FISTP, OperandCodeX87::Mq_St), _ => { unreachable!("impossible r"); } } } @@ -9838,7 +10112,7 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i if instruction.opcode == Opcode::Invalid { return Err(DecodeError::InvalidOpcode); } - // TODO: support 80-bit operands + match x87_operands { OperandCodeX87::Est => { instruction.operands[0] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; @@ -9850,10 +10124,51 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i instruction.operands[1] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; instruction.operand_count = 2; } + OperandCodeX87::St_Edst => { + instruction.operands[0] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operands[1] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = 4; + } + instruction.operand_count = 2; + } + OperandCodeX87::St_Eqst => { + instruction.operands[0] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operands[1] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = 8; + } + instruction.operand_count = 2; + } OperandCodeX87::St_Ew => { instruction.operands[0] = OperandSpec::RegRRR; instruction.modrm_rrr = RegSpec::st(0); instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 2, length)?; + if instruction.operands[1] != OperandSpec::RegMMM { + instruction.mem_size = 2; + } + instruction.operand_count = 2; + } + OperandCodeX87::St_Mm => { + instruction.operands[0] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[1] == OperandSpec::RegMMM { + return Err(DecodeError::InvalidOperand); + } + instruction.mem_size = 10; + instruction.operand_count = 2; + } + OperandCodeX87::St_Mq => { + instruction.operands[0] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[1] == OperandSpec::RegMMM { + return Err(DecodeError::InvalidOperand); + } + instruction.mem_size = 8; instruction.operand_count = 2; } OperandCodeX87::St_Md => { @@ -9863,18 +10178,25 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i if instruction.operands[1] == OperandSpec::RegMMM { return Err(DecodeError::InvalidOperand); } + instruction.mem_size = 4; instruction.operand_count = 2; } - OperandCodeX87::Md => { - instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; - if instruction.operands[0] == OperandSpec::RegMMM { + OperandCodeX87::St_Mw => { + instruction.operands[0] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[1] == OperandSpec::RegMMM { return Err(DecodeError::InvalidOperand); } - instruction.operand_count = 1; + instruction.mem_size = 2; + instruction.operand_count = 2; } OperandCodeX87::Ew => { instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 2, length)?; instruction.operand_count = 1; + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 2; + } } OperandCodeX87::Est_St => { instruction.operands[0] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; @@ -9882,10 +10204,51 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i instruction.modrm_rrr = RegSpec::st(0); instruction.operand_count = 2; } + OperandCodeX87::Edst_St => { + instruction.operands[0] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; + instruction.operands[1] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operand_count = 2; + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 4; + } + } + OperandCodeX87::Eqst_St => { + instruction.operands[0] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; + instruction.operands[1] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operand_count = 2; + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 8; + } + } OperandCodeX87::Ed_St => { instruction.operands[0] = read_E_st(&mut bytes_iter, instruction, modrm, length)?; instruction.operands[1] = OperandSpec::RegRRR; instruction.modrm_rrr = RegSpec::st(0); + if instruction.operands[0] != OperandSpec::RegMMM { + instruction.mem_size = 4; + } + instruction.operand_count = 2; + } + OperandCodeX87::Mm_St => { + instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[0] == OperandSpec::RegMMM { + return Err(DecodeError::InvalidOperand); + } + instruction.mem_size = 10; + instruction.operands[1] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operand_count = 2; + } + OperandCodeX87::Mq_St => { + instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[0] == OperandSpec::RegMMM { + return Err(DecodeError::InvalidOperand); + } + instruction.mem_size = 8; + instruction.operands[1] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); instruction.operand_count = 2; } OperandCodeX87::Md_St => { @@ -9893,6 +10256,17 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i if instruction.operands[0] == OperandSpec::RegMMM { return Err(DecodeError::InvalidOperand); } + instruction.mem_size = 4; + instruction.operands[1] = OperandSpec::RegRRR; + instruction.modrm_rrr = RegSpec::st(0); + instruction.operand_count = 2; + } + OperandCodeX87::Mw_St => { + instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; + if instruction.operands[0] == OperandSpec::RegMMM { + return Err(DecodeError::InvalidOperand); + } + instruction.mem_size = 2; instruction.operands[1] = OperandSpec::RegRRR; instruction.modrm_rrr = RegSpec::st(0); instruction.operand_count = 2; @@ -9900,6 +10274,10 @@ fn decode_x87>(_decoder: &InstDecoder, mut bytes_iter: T, i OperandCodeX87::Ex87S => { instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; instruction.operand_count = 1; + if instruction.operands[0] == OperandSpec::RegMMM { + return Err(DecodeError::InvalidOperand); + } + instruction.mem_size = 63; } OperandCodeX87::Nothing => { instruction.operand_count = 0; diff --git a/src/protected_mode/vex.rs b/src/protected_mode/vex.rs index 5c66654..d4104cd 100644 --- a/src/protected_mode/vex.rs +++ b/src/protected_mode/vex.rs @@ -328,6 +328,15 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operand_count = 3; }, other => { + if instruction.vex_reg.num != 0 { + instruction.opcode = Opcode::Invalid; + return Err(DecodeError::InvalidOperand); + } + if instruction.opcode == Opcode::VMOVSS { + instruction.mem_size = 4; + } else { + instruction.mem_size = 8; + } instruction.operands[1] = other; instruction.operand_count = 2; } @@ -348,6 +357,15 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operand_count = 3; }, other => { + if instruction.vex_reg.num != 0 { + instruction.opcode = Opcode::Invalid; + return Err(DecodeError::InvalidOperand); + } + if instruction.opcode == Opcode::VMOVSS { + instruction.mem_size = 4; + } else { + instruction.mem_size = 8; + } instruction.operands[0] = other; instruction.operand_count = 2; } @@ -369,6 +387,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = mem_oper; instruction.operands[1] = OperandSpec::RegRRR; instruction.operands[2] = OperandSpec::ImmU8; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 1; + } instruction.operand_count = 3; instruction.imm = read_imm_unsigned(bytes, 1, length)?; Ok(()) @@ -611,8 +632,28 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operand_count = 3; Ok(()) } - _op @ VEXOperandCode::G_V_M_xmm | - _op @ VEXOperandCode::G_V_E_xmm => { + VEXOperandCode::G_V_M_xmm => { + let modrm = read_modrm(bytes, length)?; + if modrm & 0xc0 == 0xc0 { + return Err(DecodeError::InvalidOperand); + } + instruction.modrm_rrr = + RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::X); + let mem_oper = read_E_xmm(bytes, instruction, modrm, length)?; + instruction.operands[0] = OperandSpec::RegRRR; + instruction.operands[1] = OperandSpec::RegVex; + instruction.operands[2] = mem_oper; + if mem_oper != OperandSpec::RegMMM { + if instruction.opcode == Opcode::VMOVLPD || instruction.opcode == Opcode::VMOVHPD { + instruction.mem_size = 8; + } else { + instruction.mem_size = 16; + } + } + instruction.operand_count = 3; + Ok(()) + } + VEXOperandCode::G_V_E_xmm => { let modrm = read_modrm(bytes, length)?; instruction.modrm_rrr = RegSpec::from_parts((modrm >> 3) & 7, RegisterBank::X); @@ -620,6 +661,15 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = OperandSpec::RegVex; instruction.operands[2] = mem_oper; + if mem_oper != OperandSpec::RegMMM { + if [Opcode::VSQRTSS, Opcode::VADDSS, Opcode::VMULSS, Opcode::VSUBSS, Opcode::VMINSS, Opcode::VDIVSS, Opcode::VMAXSS].contains(&instruction.opcode) { + instruction.mem_size = 4; + } else if [Opcode::VSQRTSD, Opcode::VADDSD, Opcode::VMULSD, Opcode::VSUBSD, Opcode::VMINSD, Opcode::VDIVSD, Opcode::VMAXSD].contains(&instruction.opcode) { + instruction.mem_size = 8; + } else { + instruction.mem_size = 16; + } + } instruction.operand_count = 3; Ok(()) } @@ -672,6 +722,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = mem_oper; instruction.operands[1] = OperandSpec::RegVex; instruction.operands[2] = OperandSpec::RegRRR; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 16; + } instruction.operand_count = 3; Ok(()) } @@ -685,6 +738,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = mem_oper; instruction.operands[2] = OperandSpec::RegVex; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 4; + } instruction.operand_count = 3; Ok(()) } @@ -698,6 +754,13 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = mem_oper; instruction.operands[2] = OperandSpec::RegVex; + if mem_oper != OperandSpec::RegMMM { + if instruction.opcode == Opcode::VPGATHERDD { + instruction.mem_size = 4; + } else { + instruction.mem_size = 8; + } + } instruction.operand_count = 3; Ok(()) } @@ -711,6 +774,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = OperandSpec::RegVex; instruction.operands[2] = mem_oper; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = opwidth; + } instruction.operand_count = 3; Ok(()) } @@ -724,6 +790,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = mem_oper; instruction.operands[2] = OperandSpec::RegVex; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = opwidth; + } instruction.operand_count = 3; Ok(()) } @@ -737,6 +806,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[1] = mem_oper; instruction.imm = read_imm_unsigned(bytes, 1, length)?; instruction.operands[2] = OperandSpec::ImmI8; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = opwidth; + } instruction.operand_count = 3; Ok(()) } @@ -764,6 +836,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegVex; instruction.operands[1] = mem_oper; instruction.operand_count = 2; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = opwidth; + } instruction.vex_reg.bank = bank; Ok(()) } @@ -776,6 +851,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[1] = mem_oper; instruction.imm = read_imm_unsigned(bytes, 1, length)?; instruction.operands[2] = OperandSpec::ImmU8; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 32; + } instruction.operand_count = 3; Ok(()) } @@ -790,6 +868,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[2] = mem_oper; instruction.imm = read_imm_unsigned(bytes, 1, length)? >> 4; instruction.operands[3] = OperandSpec::Reg4; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 32; + } instruction.operand_count = 4; Ok(()) } @@ -804,6 +885,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[2] = mem_oper; instruction.imm = read_imm_unsigned(bytes, 1, length)? >> 4; instruction.operands[3] = OperandSpec::Reg4; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 16; + } instruction.operand_count = 4; Ok(()) } @@ -816,6 +900,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = OperandSpec::RegVex; instruction.operands[2] = mem_oper; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 16; + } instruction.operand_count = 3; Ok(()) } @@ -831,6 +918,9 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst instruction.operands[2] = mem_oper; instruction.imm = read_imm_unsigned(bytes, 1, length)?; instruction.operands[3] = OperandSpec::ImmI8; + if mem_oper != OperandSpec::RegMMM { + instruction.mem_size = 2; + } instruction.operand_count = 4; Ok(()) diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs index 2cd5602..7761d32 100644 --- a/test/protected_mode/mod.rs +++ b/test/protected_mode/mod.rs @@ -54,35 +54,35 @@ fn test_display_under(decoder: &InstDecoder, data: &[u8], expected: &'static str #[test] fn test_modrm_decode() { // just modrm - test_display(&[0x33, 0x08], "xor ecx, [eax]"); - test_display(&[0x33, 0x20], "xor esp, [eax]"); - test_display(&[0x33, 0x05, 0x78, 0x56, 0x34, 0x12], "xor eax, [0x12345678]"); - test_display(&[0x33, 0x41, 0x23], "xor eax, [ecx + 0x23]"); - test_display(&[0x33, 0x81, 0x23, 0x01, 0x65, 0x43], "xor eax, [ecx + 0x43650123]"); + test_display(&[0x33, 0x08], "xor ecx, dword [eax]"); + test_display(&[0x33, 0x20], "xor esp, dword [eax]"); + test_display(&[0x33, 0x05, 0x78, 0x56, 0x34, 0x12], "xor eax, dword [0x12345678]"); + test_display(&[0x33, 0x41, 0x23], "xor eax, dword [ecx + 0x23]"); + test_display(&[0x33, 0x81, 0x23, 0x01, 0x65, 0x43], "xor eax, dword [ecx + 0x43650123]"); test_display(&[0x33, 0xc1], "xor eax, ecx"); // sib - test_display(&[0x33, 0x04, 0x0a], "xor eax, [edx + ecx * 1]"); - test_display(&[0x33, 0x04, 0x4a], "xor eax, [edx + ecx * 2]"); - test_display(&[0x33, 0x04, 0x8a], "xor eax, [edx + ecx * 4]"); - test_display(&[0x33, 0x04, 0xca], "xor eax, [edx + ecx * 8]"); - test_display(&[0x33, 0x04, 0x20], "xor eax, [eax]"); - test_display(&[0x33, 0x04, 0x60], "xor eax, [eax]"); - test_display(&[0x33, 0x04, 0xa0], "xor eax, [eax]"); - test_display(&[0x33, 0x04, 0xe0], "xor eax, [eax]"); - test_display(&[0x33, 0x04, 0x25, 0x11, 0x22, 0x33, 0x44], "xor eax, [0x44332211]"); - - test_display(&[0x33, 0x44, 0x65, 0x11], "xor eax, [ebp + 0x11]"); - test_display(&[0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44], "xor eax, [ebp + 0x44332211]"); - test_display(&[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44], "xor eax, [0x44332211]"); + test_display(&[0x33, 0x04, 0x0a], "xor eax, dword [edx + ecx * 1]"); + test_display(&[0x33, 0x04, 0x4a], "xor eax, dword [edx + ecx * 2]"); + test_display(&[0x33, 0x04, 0x8a], "xor eax, dword [edx + ecx * 4]"); + test_display(&[0x33, 0x04, 0xca], "xor eax, dword [edx + ecx * 8]"); + test_display(&[0x33, 0x04, 0x20], "xor eax, dword [eax]"); + test_display(&[0x33, 0x04, 0x60], "xor eax, dword [eax]"); + test_display(&[0x33, 0x04, 0xa0], "xor eax, dword [eax]"); + test_display(&[0x33, 0x04, 0xe0], "xor eax, dword [eax]"); + test_display(&[0x33, 0x04, 0x25, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]"); + + test_display(&[0x33, 0x44, 0x65, 0x11], "xor eax, dword [ebp + 0x11]"); + test_display(&[0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [ebp + 0x44332211]"); + test_display(&[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]"); // specifically sib with base == 0b101 // mod bits 00 - test_display(&[0x33, 0x34, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, [0x50403020]"); + test_display(&[0x33, 0x34, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, dword [0x50403020]"); // mod bits 01 - test_display(&[0x33, 0x74, 0x25, 0x20], "xor esi, [ebp + 0x20]"); + test_display(&[0x33, 0x74, 0x25, 0x20], "xor esi, dword [ebp + 0x20]"); // mod bits 10 - test_display(&[0x33, 0xb4, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, [ebp + 0x50403020]"); + test_display(&[0x33, 0xb4, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, dword [ebp + 0x50403020]"); } #[test] @@ -90,27 +90,27 @@ fn test_mmx() { test_display(&[0x0f, 0xf7, 0xc1], "maskmovq mm0, mm1"); test_invalid(&[0x0f, 0xf7, 0x01]); - test_display(&[0x0f, 0xe7, 0x03], "movntq [ebx], mm0"); + test_display(&[0x0f, 0xe7, 0x03], "movntq qword [ebx], mm0"); test_invalid(&[0x0f, 0xe7, 0xc3]); test_invalid(&[0x66, 0x0f, 0xc3, 0x03]); - test_display(&[0x0f, 0xc3, 0x03], "movnti [ebx], eax"); + test_display(&[0x0f, 0xc3, 0x03], "movnti dword [ebx], eax"); test_invalid(&[0x0f, 0xc3, 0xc3]); test_display(&[0x0f, 0x7e, 0xcf], "movd edi, mm1"); test_display(&[0x0f, 0x7f, 0xcf], "movq mm7, mm1"); - test_display(&[0x0f, 0x7f, 0x0f], "movq [edi], mm1"); + test_display(&[0x0f, 0x7f, 0x0f], "movq qword [edi], mm1"); test_display(&[0x0f, 0xc4, 0xc0, 0x14], "pinsrw mm0, eax, 0x14"); - test_display(&[0x0f, 0xc4, 0x00, 0x14], "pinsrw mm0, [eax], 0x14"); + test_display(&[0x0f, 0xc4, 0x00, 0x14], "pinsrw mm0, word [eax], 0x14"); test_display(&[0x0f, 0xd1, 0xcf], "psrlw mm1, mm7"); - test_display(&[0x0f, 0xd1, 0x00], "psrlw mm0, [eax]"); + test_display(&[0x0f, 0xd1, 0x00], "psrlw mm0, qword [eax]"); test_invalid(&[0x0f, 0xd7, 0x00]); test_display(&[0x0f, 0xd7, 0xcf], "pmovmskb ecx, mm7"); test_display(&[0x0f, 0x3a, 0x0f, 0xc1, 0x23], "palignr mm0, mm1, 0x23"); test_display(&[0x0f, 0xf9, 0xc2], "psubw mm0, mm2"); test_display(&[0x0f, 0xfd, 0xd2], "paddw mm2, mm2"); test_display(&[0x0f, 0x6f, 0xe9], "movq mm5, mm1"); - test_display(&[0x0f, 0xe5, 0x3d, 0xaa, 0xbb, 0xcc, 0x77], "pmulhw mm7, [0x77ccbbaa]"); + test_display(&[0x0f, 0xe5, 0x3d, 0xaa, 0xbb, 0xcc, 0x77], "pmulhw mm7, qword [0x77ccbbaa]"); test_display(&[0x0f, 0x38, 0x00, 0xda], "pshufb mm3, mm2"); @@ -162,12 +162,12 @@ fn test_mmx() { fn test_cvt() { test_display(&[0x0f, 0x2c, 0xcf], "cvttps2pi mm1, xmm7"); test_display(&[0x0f, 0x2a, 0xcf], "cvtpi2ps xmm1, mm7"); - test_display(&[0x0f, 0x2a, 0x00], "cvtpi2ps xmm0, [eax]"); - test_display(&[0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, [eax]"); + test_display(&[0x0f, 0x2a, 0x00], "cvtpi2ps xmm0, qword [eax]"); + test_display(&[0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, qword [eax]"); test_display(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7"); - test_display(&[0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, [eax]"); + test_display(&[0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, dword [eax]"); test_display(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi"); - test_display(&[0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, [eax]"); + test_display(&[0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, dword [eax]"); test_display(&[0xf3, 0x0f, 0x2a, 0xcf], "cvtsi2ss xmm1, edi"); } @@ -179,22 +179,22 @@ fn test_aesni() { test_invalid_under(&InstDecoder::minimal(), bytes); } - test_instr(&[0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, [edi]"); - test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, [bx]"); + test_instr(&[0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [edi]"); + test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [bx]"); - test_instr(&[0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, [edi]"); - test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, [bx]"); + test_instr(&[0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [edi]"); + test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [bx]"); - test_instr(&[0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, [edi]"); - test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, [bx]"); + test_instr(&[0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [edi]"); + test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [bx]"); - test_instr(&[0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, [edi]"); - test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, [bx]"); + test_instr(&[0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [edi]"); + test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [bx]"); - test_instr(&[0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, [edi]"); - test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, [bx]"); + test_instr(&[0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [edi]"); + test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [bx]"); - test_instr(&[0x66, 0x0f, 0x3a, 0xdf, 0x0f, 0xaa], "aeskeygenassist xmm1, [edi], 0xaa"); + test_instr(&[0x66, 0x0f, 0x3a, 0xdf, 0x0f, 0xaa], "aeskeygenassist xmm1, xmmword [edi], 0xaa"); } #[test] @@ -205,41 +205,41 @@ fn test_sse2() { test_display_under(&InstDecoder::minimal(), bytes, text); } - test_instr(&[0xf2, 0x0f, 0x10, 0x0c, 0xc7], "movsd xmm1, [edi + eax * 8]"); - test_instr(&[0xf2, 0x0f, 0x11, 0x0c, 0xc7], "movsd [edi + eax * 8], xmm1"); - test_instr(&[0x66, 0x0f, 0x11, 0x0c, 0xc7], "movupd [edi + eax * 8], xmm1"); - test_instr(&[0x66, 0x0f, 0x12, 0x03], "movlpd xmm0, [ebx]"); // reg-mem is movlpd - test_instr(&[0x66, 0x0f, 0x13, 0x03], "movlpd [ebx], xmm0"); + test_instr(&[0xf2, 0x0f, 0x10, 0x0c, 0xc7], "movsd xmm1, qword [edi + eax * 8]"); + test_instr(&[0xf2, 0x0f, 0x11, 0x0c, 0xc7], "movsd qword [edi + eax * 8], xmm1"); + test_instr(&[0x66, 0x0f, 0x11, 0x0c, 0xc7], "movupd xmmword [edi + eax * 8], xmm1"); + test_instr(&[0x66, 0x0f, 0x12, 0x03], "movlpd xmm0, qword [ebx]"); // reg-mem is movlpd + test_instr(&[0x66, 0x0f, 0x13, 0x03], "movlpd qword [ebx], xmm0"); test_invalid(&[0x66, 0x0f, 0x13, 0xc3]); - test_instr(&[0x66, 0x0f, 0x14, 0x03], "unpcklpd xmm0, [ebx]"); + test_instr(&[0x66, 0x0f, 0x14, 0x03], "unpcklpd xmm0, xmmword [ebx]"); test_instr(&[0x66, 0x0f, 0x14, 0xc3], "unpcklpd xmm0, xmm3"); - test_instr(&[0x66, 0x0f, 0x15, 0x03], "unpckhpd xmm0, [ebx]"); + test_instr(&[0x66, 0x0f, 0x15, 0x03], "unpckhpd xmm0, xmmword [ebx]"); test_instr(&[0x66, 0x0f, 0x15, 0xc3], "unpckhpd xmm0, xmm3"); - test_instr(&[0x66, 0x0f, 0x16, 0x03], "movhpd xmm0, [ebx]"); + test_instr(&[0x66, 0x0f, 0x16, 0x03], "movhpd xmm0, qword [ebx]"); test_invalid(&[0x66, 0x0f, 0x16, 0xc3]); - test_instr(&[0x66, 0x0f, 0x17, 0x03], "movhpd [ebx], xmm0"); + test_instr(&[0x66, 0x0f, 0x17, 0x03], "movhpd qword [ebx], xmm0"); test_invalid(&[0x66, 0x0f, 0x17, 0xc3]); test_instr(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0"); - test_instr(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [eax]"); + test_instr(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]"); test_instr(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7"); - test_instr(&[0x66, 0x0f, 0x2a, 0x0f], "cvtpi2pd xmm1, [edi]"); + test_instr(&[0x66, 0x0f, 0x2a, 0x0f], "cvtpi2pd xmm1, qword [edi]"); test_instr(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi"); - test_instr(&[0xf2, 0x0f, 0x2a, 0x0f], "cvtsi2sd xmm1, [edi]"); - test_instr(&[0x66, 0x0f, 0x2b, 0x0f], "movntpd [edi], xmm1"); + test_instr(&[0xf2, 0x0f, 0x2a, 0x0f], "cvtsi2sd xmm1, dword [edi]"); + test_instr(&[0x66, 0x0f, 0x2b, 0x0f], "movntpd xmmword [edi], xmm1"); test_instr(&[0x66, 0x0f, 0x2c, 0xcf], "cvttpd2pi mm1, xmm7"); - test_instr(&[0x66, 0x0f, 0x2c, 0x0f], "cvttpd2pi mm1, [edi]"); + test_instr(&[0x66, 0x0f, 0x2c, 0x0f], "cvttpd2pi mm1, xmmword [edi]"); test_instr(&[0xf2, 0x0f, 0x2c, 0xcf], "cvttsd2si xmm1, xmm7"); - test_instr(&[0xf2, 0x0f, 0x2c, 0x0f], "cvttsd2si xmm1, [edi]"); + test_instr(&[0xf2, 0x0f, 0x2c, 0x0f], "cvttsd2si xmm1, qword [edi]"); test_instr(&[0x66, 0x0f, 0x2d, 0xcf], "cvtpd2pi mm1, xmm7"); - test_instr(&[0x66, 0x0f, 0x2d, 0x0f], "cvtpd2pi mm1, [edi]"); + test_instr(&[0x66, 0x0f, 0x2d, 0x0f], "cvtpd2pi mm1, xmmword [edi]"); test_instr(&[0xf2, 0x0f, 0x2d, 0xcf], "cvtsd2si xmm1, xmm7"); - test_instr(&[0xf2, 0x0f, 0x2d, 0x0f], "cvtsd2si xmm1, [edi]"); + test_instr(&[0xf2, 0x0f, 0x2d, 0x0f], "cvtsd2si xmm1, qword [edi]"); test_instr(&[0x66, 0x0f, 0x2e, 0xcf], "ucomisd xmm1, xmm7"); - test_instr(&[0x66, 0x0f, 0x2e, 0x0f], "ucomisd xmm1, [edi]"); + test_instr(&[0x66, 0x0f, 0x2e, 0x0f], "ucomisd xmm1, qword [edi]"); test_instr(&[0x66, 0x0f, 0x2f, 0xcf], "comisd xmm1, xmm7"); - test_instr(&[0x66, 0x0f, 0x2f, 0x0f], "comisd xmm1, [edi]"); + test_instr(&[0x66, 0x0f, 0x2f, 0x0f], "comisd xmm1, qword [edi]"); /* * .... 660f38 @@ -248,93 +248,92 @@ fn test_sse2() { test_invalid(&[0x66, 0x0f, 0x50, 0x01]); test_instr(&[0x66, 0x0f, 0x50, 0xc1], "movmskpd eax, xmm1"); - test_instr(&[0x66, 0x0f, 0x51, 0x01], "sqrtpd xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x51, 0x01], "sqrtsd xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0x51, 0x01], "sqrtpd xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x51, 0x01], "sqrtsd xmm0, qword [ecx]"); test_invalid(&[0x66, 0x0f, 0x52, 0x01]); test_invalid(&[0x66, 0x0f, 0x53, 0x01]); - test_instr(&[0x66, 0x0f, 0x54, 0x01], "andpd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x55, 0x01], "andnpd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x56, 0x01], "orpd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x57, 0x01], "xorpd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x58, 0x01], "addpd xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x58, 0x01], "addsd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x59, 0x01], "mulpd xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x59, 0x01], "mulsd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x5a, 0x01], "cvtpd2ps xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x5a, 0x01], "cvtsd2ss xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x5b, 0x01], "cvtps2dq xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x5c, 0x01], "subpd xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x5c, 0x01], "subsd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x5d, 0x01], "minpd xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x5d, 0x01], "minsd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x5e, 0x01], "divpd xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x5e, 0x01], "divsd xmm0, [ecx]"); - test_instr(&[0x66, 0x0f, 0x5f, 0x01], "maxpd xmm0, [ecx]"); - test_instr(&[0xf2, 0x0f, 0x5f, 0x01], "maxsd xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0x54, 0x01], "andpd xmm0, xmmword [ecx]"); + test_instr(&[0x66, 0x0f, 0x55, 0x01], "andnpd xmm0, xmmword [ecx]"); + test_instr(&[0x66, 0x0f, 0x56, 0x01], "orpd xmm0, xmmword [ecx]"); + test_instr(&[0x66, 0x0f, 0x57, 0x01], "xorpd xmm0, xmmword [ecx]"); + test_instr(&[0x66, 0x0f, 0x58, 0x01], "addpd xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x58, 0x01], "addsd xmm0, qword [ecx]"); + test_instr(&[0x66, 0x0f, 0x59, 0x01], "mulpd xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x59, 0x01], "mulsd xmm0, qword [ecx]"); + test_instr(&[0x66, 0x0f, 0x5a, 0x01], "cvtpd2ps xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x5a, 0x01], "cvtsd2ss xmm0, qword [ecx]"); + test_instr(&[0x66, 0x0f, 0x5b, 0x01], "cvtps2dq xmm0, xmmword [ecx]"); + test_instr(&[0x66, 0x0f, 0x5c, 0x01], "subpd xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x5c, 0x01], "subsd xmm0, qword [ecx]"); + test_instr(&[0x66, 0x0f, 0x5d, 0x01], "minpd xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x5d, 0x01], "minsd xmm0, qword [ecx]"); + test_instr(&[0x66, 0x0f, 0x5e, 0x01], "divpd xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x5e, 0x01], "divsd xmm0, qword [ecx]"); + test_instr(&[0x66, 0x0f, 0x5f, 0x01], "maxpd xmm0, xmmword [ecx]"); + test_instr(&[0xf2, 0x0f, 0x5f, 0x01], "maxsd xmm0, qword [ecx]"); test_instr( &[0x66, 0x0f, 0x60, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpcklbw xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpcklbw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x61, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpcklwd xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpcklwd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x62, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpckldq xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpckldq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x63, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "packsswb xmm3, [esp + ebx * 4 - 0x334455cc]" + "packsswb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x64, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "pcmpgtb xmm3, [esp + ebx * 4 - 0x334455cc]" + "pcmpgtb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x65, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "pcmpgtw xmm3, [esp + ebx * 4 - 0x334455cc]" + "pcmpgtw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x66, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "pcmpgtd xmm3, [esp + ebx * 4 - 0x334455cc]" + "pcmpgtd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x67, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "packuswb xmm3, [esp + ebx * 4 - 0x334455cc]" + "packuswb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x68, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpckhbw xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpckhbw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x69, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpckhwd xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpckhwd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x6a, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpckhdq xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpckhdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x6b, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "packssdw xmm3, [esp + ebx * 4 - 0x334455cc]" + "packssdw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x6c, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpcklqdq xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpcklqdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x6d, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "punpckhqdq xmm3, [esp + ebx * 4 - 0x334455cc]" + "punpckhqdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); - // TODO: this needs to be clear that the operand is `dword` test_instr( &[0x66, 0x0f, 0x6e, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "movd xmm3, [esp + ebx * 4 - 0x334455cc]" + "movd xmm3, dword [esp + ebx * 4 - 0x334455cc]" ); test_instr( &[0x66, 0x0f, 0x6f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "movdqa xmm3, [esp + ebx * 4 - 0x334455cc]" + "movdqa xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_instr(&[0x66, 0x0f, 0x6e, 0xc0], "movd xmm0, eax"); @@ -362,136 +361,136 @@ fn test_sse2() { test_instr(&[0x66, 0x0f, 0x73, 0xf0, 0x8f], "psllq xmm0, 0x8f"); test_instr(&[0x66, 0x0f, 0x73, 0xf8, 0x8f], "pslldq xmm0, 0x8f"); test_instr(&[0x66, 0x0f, 0x7e, 0xc1], "movd ecx, xmm0"); - test_instr(&[0x66, 0x0f, 0x7e, 0x01], "movd [ecx], xmm0"); + test_instr(&[0x66, 0x0f, 0x7e, 0x01], "movd dword [ecx], xmm0"); test_instr( &[0x66, 0x0f, 0x7f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "movdqa [esp + ebx * 4 - 0x334455cc], xmm3" + "movdqa xmmword [esp + ebx * 4 - 0x334455cc], xmm3" ); test_instr(&[0x66, 0x0f, 0xc2, 0xc3, 0x08], "cmppd xmm0, xmm3, 0x8"); - test_instr(&[0x66, 0x0f, 0xc2, 0x03, 0x08], "cmppd xmm0, [ebx], 0x8"); + test_instr(&[0x66, 0x0f, 0xc2, 0x03, 0x08], "cmppd xmm0, xmmword [ebx], 0x8"); test_instr(&[0xf2, 0x0f, 0xc2, 0xc3, 0x08], "cmpsd xmm0, xmm3, 0x8"); - test_instr(&[0xf2, 0x0f, 0xc2, 0x03, 0x08], "cmpsd xmm0, [ebx], 0x8"); + test_instr(&[0xf2, 0x0f, 0xc2, 0x03, 0x08], "cmpsd xmm0, qword [ebx], 0x8"); test_instr(&[0x66, 0x0f, 0xc4, 0xc3, 0x08], "pinsrw xmm0, ebx, 0x8"); - test_instr(&[0x66, 0x0f, 0xc4, 0x03, 0x08], "pinsrw xmm0, [ebx], 0x8"); + test_instr(&[0x66, 0x0f, 0xc4, 0x03, 0x08], "pinsrw xmm0, word [ebx], 0x8"); // test_instr(&[0x66, 0x0f, 0xc5, 0xc3, 0x08], "pextrw eax, xmm3, 0x8"); // test_instr_invalid(&[0x66, 0x0f, 0xc5, 0x03, 0x08]); // test_instr_invalid(&[0x66, 0x0f, 0xc5, 0x40, 0x08]); // test_instr_invalid(&[0x66, 0x0f, 0xc5, 0x80, 0x08]); - test_instr(&[0x66, 0x0f, 0xc6, 0x03, 0x08], "shufpd xmm0, [ebx], 0x8"); + test_instr(&[0x66, 0x0f, 0xc6, 0x03, 0x08], "shufpd xmm0, xmmword [ebx], 0x8"); test_instr(&[0x66, 0x0f, 0xc6, 0xc3, 0x08], "shufpd xmm0, xmm3, 0x8"); test_instr(&[0x66, 0x0f, 0xd1, 0xc1], "psrlw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xd1, 0x01], "psrlw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xd1, 0x01], "psrlw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xd2, 0xc1], "psrld xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xd2, 0x01], "psrld xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xd2, 0x01], "psrld xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xd3, 0xc1], "psrlq xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xd3, 0x01], "psrlq xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xd3, 0x01], "psrlq xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xd4, 0xc1], "paddq xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xd4, 0x01], "paddq xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xd4, 0x01], "paddq xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xd5, 0xc1], "pmullw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xd5, 0x01], "pmullw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xd5, 0x01], "pmullw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xd6, 0xc1], "movq xmm1, xmm0"); - test_instr(&[0x66, 0x0f, 0xd6, 0x01], "movq [ecx], xmm0"); + test_instr(&[0x66, 0x0f, 0xd6, 0x01], "movq qword [ecx], xmm0"); test_invalid(&[0xf3, 0x0f, 0xd6, 0x03]); test_instr(&[0xf3, 0x0f, 0xd6, 0xc3], "movq2dq xmm0, mm3"); test_instr(&[0xf2, 0x0f, 0xd6, 0xc3], "movdq2q mm0, xmm3"); test_instr(&[0x66, 0x0f, 0xd7, 0xc1], "pmovmskb eax, xmm1"); test_invalid(&[0x66, 0x0f, 0xd7, 0x01]); test_instr(&[0x66, 0x0f, 0xd8, 0xc1], "psubusb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xd8, 0x01], "psubusb xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xd8, 0x01], "psubusb xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xd9, 0xc1], "psubusw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xd9, 0x01], "psubusw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xd9, 0x01], "psubusw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xda, 0xc1], "pminub xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xda, 0x01], "pminub xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xda, 0x01], "pminub xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xdb, 0xc1], "pand xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xdb, 0x01], "pand xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xdb, 0x01], "pand xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xdc, 0xc1], "paddusb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xdc, 0x01], "paddusb xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xdc, 0x01], "paddusb xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xdd, 0xc1], "paddusw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xdd, 0x01], "paddusw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xdd, 0x01], "paddusw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xde, 0xc1], "pmaxub xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xde, 0x01], "pmaxub xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xde, 0x01], "pmaxub xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xdf, 0xc1], "pandn xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xdf, 0x01], "pandn xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xdf, 0x01], "pandn xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe0, 0xc1], "pavgb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe0, 0x01], "pavgb xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe0, 0x01], "pavgb xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe1, 0xc1], "psraw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe1, 0x01], "psraw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe1, 0x01], "psraw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe2, 0xc1], "psrad xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe2, 0x01], "psrad xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe2, 0x01], "psrad xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe3, 0xc1], "pavgw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe3, 0x01], "pavgw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe3, 0x01], "pavgw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe4, 0xc1], "pmulhuw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe4, 0x01], "pmulhuw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe4, 0x01], "pmulhuw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe5, 0xc1], "pmulhw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe5, 0x01], "pmulhw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe5, 0x01], "pmulhw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe6, 0xc1], "cvttpd2dq xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe6, 0x01], "cvttpd2dq xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe6, 0x01], "cvttpd2dq xmm0, xmmword [ecx]"); test_invalid(&[0x66, 0x0f, 0xe7, 0xc1]); - test_instr(&[0x66, 0x0f, 0xe7, 0x01], "movntdq [ecx], xmm0"); + test_instr(&[0x66, 0x0f, 0xe7, 0x01], "movntdq xmmword [ecx], xmm0"); test_instr(&[0x66, 0x0f, 0xe8, 0xc1], "psubsb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe8, 0x01], "psubsb xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe8, 0x01], "psubsb xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xe9, 0xc1], "psubsw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xe9, 0x01], "psubsw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xe9, 0x01], "psubsw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xea, 0xc1], "pminsw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xea, 0x01], "pminsw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xea, 0x01], "pminsw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xeb, 0xc3], "por xmm0, xmm3"); test_instr(&[0x66, 0x0f, 0xeb, 0xc4], "por xmm0, xmm4"); test_instr(&[0x66, 0x0f, 0xeb, 0xd3], "por xmm2, xmm3"); - test_instr(&[0x66, 0x0f, 0xeb, 0x12], "por xmm2, [edx]"); + test_instr(&[0x66, 0x0f, 0xeb, 0x12], "por xmm2, xmmword [edx]"); test_instr(&[0x66, 0x0f, 0xeb, 0xc1], "por xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xeb, 0x01], "por xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xeb, 0x01], "por xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xec, 0xc1], "paddsb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xec, 0x01], "paddsb xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xec, 0x01], "paddsb xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xed, 0xc1], "paddsw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xed, 0x01], "paddsw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xed, 0x01], "paddsw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xee, 0xc1], "pmaxsw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xee, 0x01], "pmaxsw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xee, 0x01], "pmaxsw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xef, 0xc1], "pxor xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xef, 0x01], "pxor xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xef, 0x01], "pxor xmm0, xmmword [ecx]"); test_invalid(&[0x66, 0x0f, 0xf0, 0xc1]); test_invalid(&[0x66, 0x0f, 0xf0, 0x01]); test_instr(&[0x66, 0x0f, 0xf1, 0xc1], "psllw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf1, 0x01], "psllw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf1, 0x01], "psllw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xf2, 0xc1], "pslld xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf2, 0x01], "pslld xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf2, 0x01], "pslld xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xf3, 0xc1], "psllq xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf3, 0x01], "psllq xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf3, 0x01], "psllq xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xf4, 0xc1], "pmuludq xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf4, 0x01], "pmuludq xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf4, 0x01], "pmuludq xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xf5, 0xc1], "pmaddwd xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf5, 0x01], "pmaddwd xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf5, 0x01], "pmaddwd xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xf6, 0xc1], "psadbw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf6, 0x01], "psadbw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf6, 0x01], "psadbw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xf7, 0xc1], "maskmovdqu xmm0, xmm1"); test_invalid(&[0x66, 0x0f, 0xf7, 0x01]); test_instr(&[0x66, 0x0f, 0xf8, 0xc1], "psubb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf8, 0x01], "psubb xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf8, 0x01], "psubb xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xf9, 0xc1], "psubw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xf9, 0x01], "psubw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xf9, 0x01], "psubw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xfa, 0xc1], "psubd xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xfa, 0x01], "psubd xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xfa, 0x01], "psubd xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xfb, 0xc1], "psubq xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xfb, 0x01], "psubq xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xfb, 0x01], "psubq xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xfc, 0xc1], "paddb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xfc, 0x01], "paddb xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xfc, 0x01], "paddb xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xfd, 0xc1], "paddw xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xfd, 0x01], "paddw xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xfd, 0x01], "paddw xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xfe, 0xc1], "paddd xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0xfe, 0x01], "paddd xmm0, [ecx]"); + test_instr(&[0x66, 0x0f, 0xfe, 0x01], "paddd xmm0, xmmword [ecx]"); test_instr(&[0x66, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"); test_instr(&[0xf2, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"); test_instr(&[0xf3, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"); - test_instr(&[0x66, 0x0f, 0xff, 0x01], "ud0 eax, [ecx]"); + test_instr(&[0x66, 0x0f, 0xff, 0x01], "ud0 eax, word [ecx]"); test_instr(&[0x66, 0x0f, 0x74, 0xc1], "pcmpeqb xmm0, xmm1"); - test_instr(&[0x66, 0x0f, 0x74, 0x12], "pcmpeqb xmm2, [edx]"); + test_instr(&[0x66, 0x0f, 0x74, 0x12], "pcmpeqb xmm2, xmmword [edx]"); test_instr(&[0x66, 0x0f, 0xf8, 0xc8], "psubb xmm1, xmm0"); test_instr(&[0x66, 0x0f, 0xf8, 0xd0], "psubb xmm2, xmm0"); - test_instr(&[0x66, 0x0f, 0xf8, 0x12], "psubb xmm2, [edx]"); + test_instr(&[0x66, 0x0f, 0xf8, 0x12], "psubb xmm2, xmmword [edx]"); } #[test] @@ -510,30 +509,30 @@ fn test_sse3() { test_invalid_under(&InstDecoder::minimal().with_sse3(), bytes); test_invalid_under(&InstDecoder::default(), bytes); } - test_instr(&[0xf2, 0x0f, 0xf0, 0x0f], "lddqu xmm1, [edi]"); + test_instr(&[0xf2, 0x0f, 0xf0, 0x0f], "lddqu xmm1, xmmword [edi]"); test_instr_invalid(&[0xf2, 0x0f, 0xf0, 0xcf]); - test_instr(&[0xf2, 0x0f, 0xd0, 0x0f], "addsubps xmm1, [edi]"); + test_instr(&[0xf2, 0x0f, 0xd0, 0x0f], "addsubps xmm1, xmmword [edi]"); test_instr(&[0xf2, 0x0f, 0xd0, 0xcf], "addsubps xmm1, xmm7"); test_invalid(&[0xf3, 0x0f, 0xd0, 0x0f]); - test_instr(&[0x66, 0x0f, 0xd0, 0x0f], "addsubpd xmm1, [edi]"); + test_instr(&[0x66, 0x0f, 0xd0, 0x0f], "addsubpd xmm1, xmmword [edi]"); test_instr(&[0x66, 0x0f, 0xd0, 0xcf], "addsubpd xmm1, xmm7"); - test_instr(&[0xf2, 0x0f, 0x7c, 0x0f], "haddps xmm1, [edi]"); + test_instr(&[0xf2, 0x0f, 0x7c, 0x0f], "haddps xmm1, xmmword [edi]"); test_instr(&[0xf2, 0x0f, 0x7c, 0xcf], "haddps xmm1, xmm7"); - test_instr(&[0x66, 0x0f, 0x7c, 0x0f], "haddpd xmm1, [edi]"); + test_instr(&[0x66, 0x0f, 0x7c, 0x0f], "haddpd xmm1, xmmword [edi]"); test_instr(&[0x66, 0x0f, 0x7c, 0xcf], "haddpd xmm1, xmm7"); - test_instr(&[0xf2, 0x0f, 0x7d, 0x0f], "hsubps xmm1, [edi]"); + test_instr(&[0xf2, 0x0f, 0x7d, 0x0f], "hsubps xmm1, xmmword [edi]"); test_instr(&[0xf2, 0x0f, 0x7d, 0xcf], "hsubps xmm1, xmm7"); - test_instr(&[0x66, 0x0f, 0x7d, 0x0f], "hsubpd xmm1, [edi]"); + test_instr(&[0x66, 0x0f, 0x7d, 0x0f], "hsubpd xmm1, xmmword [edi]"); test_instr(&[0x66, 0x0f, 0x7d, 0xcf], "hsubpd xmm1, xmm7"); - test_instr(&[0xf3, 0x0f, 0x12, 0x0f], "movsldup xmm1, [edi]"); + test_instr(&[0xf3, 0x0f, 0x12, 0x0f], "movsldup xmm1, xmmword [edi]"); test_instr(&[0xf3, 0x0f, 0x12, 0xcf], "movsldup xmm1, xmm7"); - test_instr(&[0xf3, 0x0f, 0x16, 0x0f], "movshdup xmm1, [edi]"); + test_instr(&[0xf3, 0x0f, 0x16, 0x0f], "movshdup xmm1, xmmword [edi]"); test_instr(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7"); - test_instr(&[0xf2, 0x0f, 0x12, 0x0f], "movddup xmm1, [edi]"); + test_instr(&[0xf2, 0x0f, 0x12, 0x0f], "movddup xmm1, qword [edi]"); test_instr(&[0xf2, 0x0f, 0x12, 0xcf], "movddup xmm1, xmm7"); test_instr(&[0x0f, 0x01, 0xc8], "monitor"); @@ -562,23 +561,23 @@ fn test_sse4_2() { test_invalid_under(&InstDecoder::default(), bytes); } - test_instr(&[0x66, 0x0f, 0x38, 0x37, 0x03], "pcmpgtq xmm0, [ebx]"); + test_instr(&[0x66, 0x0f, 0x38, 0x37, 0x03], "pcmpgtq xmm0, xmmword [ebx]"); test_instr(&[0x66, 0x0f, 0x38, 0x37, 0xc3], "pcmpgtq xmm0, xmm3"); - test_instr(&[0xf2, 0x0f, 0x38, 0xf0, 0x06], "crc32 eax, [esi]"); + test_instr(&[0xf2, 0x0f, 0x38, 0xf0, 0x06], "crc32 eax, byte [esi]"); test_instr(&[0xf2, 0x0f, 0x38, 0xf0, 0xc6], "crc32 eax, dh"); - test_instr(&[0xf2, 0x0f, 0x38, 0xf1, 0x06], "crc32 eax, [esi]"); + test_instr(&[0xf2, 0x0f, 0x38, 0xf1, 0x06], "crc32 eax, dword [esi]"); test_instr(&[0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, esi"); test_instr(&[0x66, 0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, si"); test_instr(&[0x66, 0x0f, 0x3a, 0x60, 0xc6, 0x54], "pcmpestrm xmm0, xmm6, 0x54"); - test_instr(&[0x66, 0x0f, 0x3a, 0x60, 0x06, 0x54], "pcmpestrm xmm0, [esi], 0x54"); + test_instr(&[0x66, 0x0f, 0x3a, 0x60, 0x06, 0x54], "pcmpestrm xmm0, xmmword [esi], 0x54"); test_instr(&[0x66, 0x0f, 0x3a, 0x61, 0xc6, 0x54], "pcmpestri xmm0, xmm6, 0x54"); - test_instr(&[0x66, 0x0f, 0x3a, 0x61, 0x06, 0x54], "pcmpestri xmm0, [esi], 0x54"); + test_instr(&[0x66, 0x0f, 0x3a, 0x61, 0x06, 0x54], "pcmpestri xmm0, xmmword [esi], 0x54"); test_instr(&[0x66, 0x0f, 0x3a, 0x62, 0xc6, 0x54], "pcmpistrm xmm0, xmm6, 0x54"); - test_instr(&[0x66, 0x0f, 0x3a, 0x62, 0x06, 0x54], "pcmpistrm xmm0, [esi], 0x54"); + test_instr(&[0x66, 0x0f, 0x3a, 0x62, 0x06, 0x54], "pcmpistrm xmm0, xmmword [esi], 0x54"); test_instr(&[0x66, 0x0f, 0x3a, 0x63, 0xc6, 0x54], "pcmpistri xmm0, xmm6, 0x54"); - test_instr(&[0x66, 0x0f, 0x3a, 0x63, 0x06, 0x54], "pcmpistri xmm0, [esi], 0x54"); + test_instr(&[0x66, 0x0f, 0x3a, 0x63, 0x06, 0x54], "pcmpistri xmm0, xmmword [esi], 0x54"); } #[test] @@ -598,114 +597,114 @@ fn test_sse4_1() { test_invalid_under(&InstDecoder::default(), bytes); } - test_instr(&[0x66, 0x0f, 0x3a, 0x0c, 0x11, 0x22], "blendps xmm2, [ecx], 0x22"); + test_instr(&[0x66, 0x0f, 0x3a, 0x0c, 0x11, 0x22], "blendps xmm2, xmmword [ecx], 0x22"); test_instr(&[0x66, 0x0f, 0x3a, 0x0c, 0xc1, 0x22], "blendps xmm0, xmm1, 0x22"); - test_instr(&[0x66, 0x0f, 0x3a, 0x0d, 0x11, 0x22], "blendpd xmm2, [ecx], 0x22"); + test_instr(&[0x66, 0x0f, 0x3a, 0x0d, 0x11, 0x22], "blendpd xmm2, xmmword [ecx], 0x22"); test_instr(&[0x66, 0x0f, 0x3a, 0x0d, 0xc1, 0x22], "blendpd xmm0, xmm1, 0x22"); - test_instr(&[0x66, 0x0f, 0x38, 0x10, 0x06], "pblendvb xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x10, 0x06], "pblendvb xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x10, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x14, 0x06], "blendvps xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x14, 0x06], "blendvps xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x14, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x15, 0x06], "blendvpd xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x15, 0x06], "blendvpd xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x15, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x17, 0x06], "ptest xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x17, 0x06], "ptest xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x17, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x20, 0x06], "pmovsxbw xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x20, 0x06], "pmovsxbw xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x20, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x21, 0x06], "pmovsxbd xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x21, 0x06], "pmovsxbd xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x21, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x22, 0x06], "pmovsxbq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x22, 0x06], "pmovsxbq xmm0, word [esi]"); test_invalid(&[0x0f, 0x38, 0x22, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x23, 0x06], "pmovsxwd xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x23, 0x06], "pmovsxwd xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x23, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x24, 0x06], "pmovsxwq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x24, 0x06], "pmovsxwq xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x24, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x25, 0x06], "pmovsxdq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x25, 0x06], "pmovsxdq xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x25, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x28, 0x06], "pmuldq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x28, 0x06], "pmuldq xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x28, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x29, 0x06], "pcmpeqq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x29, 0x06], "pcmpeqq xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x29, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x2a, 0x06], "movntdqa xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x2a, 0x06], "movntdqa xmm0, xmmword [esi]"); test_invalid(&[0x66, 0x0f, 0x38, 0x2a, 0xc6]); test_invalid(&[0x0f, 0x38, 0x2a, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x2b, 0x06], "packusdw xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x2b, 0x06], "packusdw xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x2b, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x30, 0x06], "pmovzxbw xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x30, 0x06], "pmovzxbw xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x30, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x31, 0x06], "pmovzxbd xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x31, 0x06], "pmovzxbd xmm0, dword [esi]"); test_invalid(&[0x0f, 0x38, 0x31, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x32, 0x06], "pmovzxbq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x32, 0x06], "pmovzxbq xmm0, word [esi]"); test_invalid(&[0x0f, 0x38, 0x32, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x33, 0x06], "pmovzxwd xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x33, 0x06], "pmovzxwd xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x33, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x34, 0x06], "pmovzxwq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x34, 0x06], "pmovzxwq xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x34, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x35, 0x06], "pmovzxdq xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x35, 0x06], "pmovzxdq xmm0, qword [esi]"); test_invalid(&[0x0f, 0x38, 0x35, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x38, 0x06], "pminsb xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x38, 0x06], "pminsb xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x38, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x39, 0x06], "pminsd xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x39, 0x06], "pminsd xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x39, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x3a, 0x06], "pminuw xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x3a, 0x06], "pminuw xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x3a, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x3b, 0x06], "pminud xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x3b, 0x06], "pminud xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x3b, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x3c, 0x06], "pmaxsb xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x3c, 0x06], "pmaxsb xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x3c, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x3d, 0x06], "pmaxsd xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x3d, 0x06], "pmaxsd xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x3d, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x3e, 0x06], "pmaxuw xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x3e, 0x06], "pmaxuw xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x3e, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x3f, 0x06], "pmaxud xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x3f, 0x06], "pmaxud xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x3f, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x40, 0x06], "pmulld xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x40, 0x06], "pmulld xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x40, 0x06]); - test_instr(&[0x66, 0x0f, 0x38, 0x41, 0x06], "phminposuw xmm0, [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x41, 0x06], "phminposuw xmm0, xmmword [esi]"); test_invalid(&[0x0f, 0x38, 0x41, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x08, 0x06, 0x31], "roundps xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x08, 0x06, 0x31], "roundps xmm0, xmmword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x08, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x09, 0x06, 0x31], "roundpd xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x09, 0x06, 0x31], "roundpd xmm0, xmmword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x09, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x0a, 0x06, 0x31], "roundss xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x0a, 0x06, 0x31], "roundss xmm0, xmmword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x0a, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x0b, 0x06, 0x31], "roundsd xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x0b, 0x06, 0x31], "roundsd xmm0, xmmword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x0b, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x0e, 0x06, 0x31], "pblendw xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x0e, 0x06, 0x31], "pblendw xmm0, xmmword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x0e, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x14, 0x06, 0x31], "pextrb xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x14, 0x06, 0x31], "pextrb xmm0, byte [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x14, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x15, 0x06, 0x31], "pextrw xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x15, 0x06, 0x31], "pextrw xmm0, word [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x15, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x16, 0x06, 0x31], "pextrd xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x16, 0x06, 0x31], "pextrd xmm0, dword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x16, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x17, 0x06, 0x31], "extractps xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x17, 0x06, 0x31], "extractps xmm0, dword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x17, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x20, 0x06, 0x31], "pinsrb xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x20, 0x06, 0x31], "pinsrb xmm0, byte [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x20, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x21, 0x06, 0x31], "insertps xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x21, 0x06, 0x31], "insertps xmm0, dword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x21, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x22, 0x06, 0x31], "pinsrd xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x22, 0x06, 0x31], "pinsrd xmm0, dword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x22, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x40, 0x06, 0x31], "dpps xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x40, 0x06, 0x31], "dpps xmm0, xmmword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x40, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x41, 0x06, 0x31], "dppd xmm0, [esi], 0x31"); + test_instr(&[0x66, 0x0f, 0x3a, 0x41, 0x06, 0x31], "dppd xmm0, xmmword [esi], 0x31"); test_invalid(&[0x0f, 0x3a, 0x41, 0x06]); - test_instr(&[0x66, 0x0f, 0x3a, 0x42, 0x06, 0x44], "mpsadbw xmm0, [esi], 0x44"); + test_instr(&[0x66, 0x0f, 0x3a, 0x42, 0x06, 0x44], "mpsadbw xmm0, xmmword [esi], 0x44"); test_invalid(&[0x0f, 0x3a, 0x42, 0x06]); } @@ -727,57 +726,57 @@ fn test_ssse3() { test_invalid_under(&InstDecoder::default(), bytes); } test_instr(&[0x66, 0x0f, 0x38, 0x00, 0xda], "pshufb xmm3, xmm2"); - test_instr(&[0x66, 0x0f, 0x38, 0x00, 0x06], "pshufb xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x00, 0x06], "pshufb mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x01, 0x06], "phaddw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x01, 0x06], "phaddw mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x02, 0x06], "phaddd xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x02, 0x06], "phaddd mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x03, 0x06], "phaddsw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x03, 0x06], "phaddsw mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x04, 0x06], "pmaddubsw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x04, 0x06], "pmaddubsw mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x05, 0x06], "phsubw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x05, 0x06], "phsubw mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x06, 0x06], "phsubd xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x06, 0x06], "phsubd mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x07, 0x06], "phsubsw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x07, 0x06], "phsubsw mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x08, 0x06], "psignb xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x08, 0x06], "psignb mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x09, 0x06], "psignw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x09, 0x06], "psignw mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x0a, 0x06], "psignd xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x0a, 0x06], "psignd mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x0b, 0x06], "pmulhrsw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x0b, 0x06], "pmulhrsw mm0, [esi]"); - - test_instr(&[0x66, 0x0f, 0x38, 0x1c, 0x06], "pabsb xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x1c, 0x06], "pabsb mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x1d, 0x06], "pabsw xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x1d, 0x06], "pabsw mm0, [esi]"); - test_instr(&[0x66, 0x0f, 0x38, 0x1e, 0x06], "pabsd xmm0, [esi]"); - test_instr(&[0x0f, 0x38, 0x1e, 0x06], "pabsd mm0, [esi]"); - - test_instr(&[0x66, 0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr xmm0, [esi], 0x30"); - test_instr(&[0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr mm0, [esi], 0x30"); + test_instr(&[0x66, 0x0f, 0x38, 0x00, 0x06], "pshufb xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x00, 0x06], "pshufb mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x01, 0x06], "phaddw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x01, 0x06], "phaddw mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x02, 0x06], "phaddd xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x02, 0x06], "phaddd mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x03, 0x06], "phaddsw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x03, 0x06], "phaddsw mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x04, 0x06], "pmaddubsw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x04, 0x06], "pmaddubsw mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x05, 0x06], "phsubw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x05, 0x06], "phsubw mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x06, 0x06], "phsubd xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x06, 0x06], "phsubd mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x07, 0x06], "phsubsw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x07, 0x06], "phsubsw mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x08, 0x06], "psignb xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x08, 0x06], "psignb mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x09, 0x06], "psignw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x09, 0x06], "psignw mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x0a, 0x06], "psignd xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x0a, 0x06], "psignd mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x0b, 0x06], "pmulhrsw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x0b, 0x06], "pmulhrsw mm0, qword [esi]"); + + test_instr(&[0x66, 0x0f, 0x38, 0x1c, 0x06], "pabsb xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x1c, 0x06], "pabsb mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x1d, 0x06], "pabsw xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x1d, 0x06], "pabsw mm0, qword [esi]"); + test_instr(&[0x66, 0x0f, 0x38, 0x1e, 0x06], "pabsd xmm0, xmmword [esi]"); + test_instr(&[0x0f, 0x38, 0x1e, 0x06], "pabsd mm0, qword [esi]"); + + test_instr(&[0x66, 0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr xmm0, xmmword [esi], 0x30"); + test_instr(&[0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr mm0, qword [esi], 0x30"); } #[test] fn test_0f01() { // drawn heavily from "Table A-6. Opcode Extensions for One- and Two-byte Opcodes by Group // Number" - test_display(&[0x0f, 0x01, 0x38], "invlpg [eax]"); - test_display(&[0x0f, 0x01, 0x3f], "invlpg [edi]"); - test_display(&[0x0f, 0x01, 0x40, 0xff], "sgdt [eax - 0x1]"); - test_display(&[0x0f, 0x01, 0x41, 0xff], "sgdt [ecx - 0x1]"); - test_display(&[0x0f, 0x01, 0x49, 0xff], "sidt [ecx - 0x1]"); - test_display(&[0x0f, 0x01, 0x51, 0xff], "lgdt [ecx - 0x1]"); - test_display(&[0x0f, 0x01, 0x59, 0xff], "lidt [ecx - 0x1]"); - test_display(&[0x0f, 0x01, 0x61, 0xff], "smsw [ecx - 0x1]"); + test_display(&[0x0f, 0x01, 0x38], "invlpg byte [eax]"); + test_display(&[0x0f, 0x01, 0x3f], "invlpg byte [edi]"); + test_display(&[0x0f, 0x01, 0x40, 0xff], "sgdt ptr [eax - 0x1]"); + test_display(&[0x0f, 0x01, 0x41, 0xff], "sgdt ptr [ecx - 0x1]"); + test_display(&[0x0f, 0x01, 0x49, 0xff], "sidt ptr [ecx - 0x1]"); + test_display(&[0x0f, 0x01, 0x51, 0xff], "lgdt ptr [ecx - 0x1]"); + test_display(&[0x0f, 0x01, 0x59, 0xff], "lidt ptr [ecx - 0x1]"); + test_display(&[0x0f, 0x01, 0x61, 0xff], "smsw word [ecx - 0x1]"); test_invalid(&[0x0f, 0x01, 0x69, 0xff]); - test_display(&[0x0f, 0x01, 0x71, 0xff], "lmsw [ecx - 0x1]"); - test_display(&[0x0f, 0x01, 0x79, 0xff], "invlpg [ecx - 0x1]"); + test_display(&[0x0f, 0x01, 0x71, 0xff], "lmsw word [ecx - 0x1]"); + test_display(&[0x0f, 0x01, 0x79, 0xff], "invlpg byte [ecx - 0x1]"); test_display(&[0x0f, 0x01, 0xc0], "enclv"); test_display(&[0x0f, 0x01, 0xc1], "vmcall"); test_display(&[0x0f, 0x01, 0xc2], "vmlaunch"); @@ -859,19 +858,19 @@ fn test_0fae() { // Number" test_invalid(&[0xf3, 0x0f, 0xae, 0x87]); test_invalid(&[0xf3, 0x0f, 0xae, 0x04, 0x4f]); - test_display(&[0x0f, 0xae, 0x04, 0x4f], "fxsave [edi + ecx * 2]"); - test_display(&[0x0f, 0xae, 0x0c, 0x4f], "fxrstor [edi + ecx * 2]"); - test_display(&[0x0f, 0xae, 0x14, 0x4f], "ldmxcsr [edi + ecx * 2]"); - test_display(&[0x0f, 0xae, 0x1c, 0x4f], "stmxcsr [edi + ecx * 2]"); - test_display(&[0x0f, 0xae, 0x24, 0x4f], "xsave [edi + ecx * 2]"); - test_display(&[0x0f, 0xc7, 0x5c, 0x24, 0x40], "xrstors [esp + 0x40]"); - test_display(&[0x0f, 0xc7, 0x64, 0x24, 0x40], "xsavec [esp + 0x40]"); - test_display(&[0x0f, 0xc7, 0x6c, 0x24, 0x40], "xsaves [esp + 0x40]"); - test_display(&[0x0f, 0xc7, 0x74, 0x24, 0x40], "vmptrld [esp + 0x40]"); - test_display(&[0x0f, 0xc7, 0x7c, 0x24, 0x40], "vmptrst [esp + 0x40]"); - test_display(&[0x0f, 0xae, 0x2c, 0x4f], "xrstor [edi + ecx * 2]"); - test_display(&[0x0f, 0xae, 0x34, 0x4f], "xsaveopt [edi + ecx * 2]"); - test_display(&[0x0f, 0xae, 0x3c, 0x4f], "clflush [edi + ecx * 2]"); + test_display(&[0x0f, 0xae, 0x04, 0x4f], "fxsave ptr [edi + ecx * 2]"); + test_display(&[0x0f, 0xae, 0x0c, 0x4f], "fxrstor ptr [edi + ecx * 2]"); + test_display(&[0x0f, 0xae, 0x14, 0x4f], "ldmxcsr dword [edi + ecx * 2]"); + test_display(&[0x0f, 0xae, 0x1c, 0x4f], "stmxcsr dword [edi + ecx * 2]"); + test_display(&[0x0f, 0xae, 0x24, 0x4f], "xsave ptr [edi + ecx * 2]"); + test_display(&[0x0f, 0xc7, 0x5c, 0x24, 0x40], "xrstors ptr [esp + 0x40]"); + test_display(&[0x0f, 0xc7, 0x64, 0x24, 0x40], "xsavec ptr [esp + 0x40]"); + test_display(&[0x0f, 0xc7, 0x6c, 0x24, 0x40], "xsaves ptr [esp + 0x40]"); + test_display(&[0x0f, 0xc7, 0x74, 0x24, 0x40], "vmptrld qword [esp + 0x40]"); + test_display(&[0x0f, 0xc7, 0x7c, 0x24, 0x40], "vmptrst qword [esp + 0x40]"); + test_display(&[0x0f, 0xae, 0x2c, 0x4f], "xrstor ptr [edi + ecx * 2]"); + test_display(&[0x0f, 0xae, 0x34, 0x4f], "xsaveopt ptr [edi + ecx * 2]"); + test_display(&[0x0f, 0xae, 0x3c, 0x4f], "clflush zmmword [edi + ecx * 2]"); for (modrm, text) in &[(0xe8u8, "lfence"), (0xf0u8, "mfence"), (0xf8u8, "sfence")] { test_display_under(&intel, &[0x0f, 0xae, *modrm], text); @@ -899,7 +898,7 @@ fn test_0fae() { #[test] fn test_system() { test_display(&[0x63, 0xc1], "arpl cx, ax"); - test_display(&[0x63, 0x04, 0xba], "arpl [edx + edi * 4], ax"); + test_display(&[0x63, 0x04, 0xba], "arpl word [edx + edi * 4], ax"); test_display(&[0x0f, 0x06], "clts"); } @@ -907,139 +906,138 @@ fn test_system() { fn test_arithmetic() { test_display(&[0x81, 0xec, 0x10, 0x03, 0x00, 0x00], "sub esp, 0x310"); test_display(&[0x0f, 0xaf, 0xc2], "imul eax, edx"); - test_display(&[0x69, 0x43, 0x6f, 0x6d, 0x70, 0x6c, 0x65], "imul eax, [ebx + 0x6f], 0x656c706d"); + test_display(&[0x69, 0x43, 0x6f, 0x6d, 0x70, 0x6c, 0x65], "imul eax, dword [ebx + 0x6f], 0x656c706d"); test_display(&[0x66, 0x0f, 0xaf, 0xd1], "imul dx, cx"); - test_display(&[0x6b, 0x43, 0x6f, 0x6d], "imul al, [ebx + 0x6f], 0x6d"); + test_display(&[0xf6, 0xe8], "imul al"); + test_display(&[0xf6, 0x28], "imul byte [eax]"); + test_display(&[0x6b, 0x43, 0x6f, 0x6d], "imul eax, dword [ebx + 0x6f], 0x6d"); test_display(&[0x00, 0xcc], "add ah, cl"); } #[test] #[allow(non_snake_case)] fn test_E_decode() { - test_display(&[0xff, 0x75, 0xb8], "push [ebp - 0x48]"); - test_display(&[0xff, 0x75, 0x08], "push [ebp + 0x8]"); + test_display(&[0xff, 0x75, 0xb8], "push dword [ebp - 0x48]"); + test_display(&[0xff, 0x75, 0x08], "push dword [ebp + 0x8]"); } #[test] fn test_sse() { - test_display(&[0xf3, 0x0f, 0x10, 0x0c, 0xc7], "movss xmm1, [edi + eax * 8]"); - test_display(&[0xf3, 0x0f, 0x11, 0x0c, 0xc7], "movss [edi + eax * 8], xmm1"); - test_display(&[0x0f, 0x28, 0x00], "movaps xmm0, [eax]"); - test_display(&[0x0f, 0x29, 0x00], "movaps [eax], xmm0"); + test_display(&[0xf3, 0x0f, 0x10, 0x0c, 0xc7], "movss xmm1, dword [edi + eax * 8]"); + test_display(&[0xf3, 0x0f, 0x11, 0x0c, 0xc7], "movss dword [edi + eax * 8], xmm1"); + test_display(&[0x0f, 0x28, 0x00], "movaps xmm0, xmmword [eax]"); + test_display(&[0x0f, 0x29, 0x00], "movaps xmmword [eax], xmm0"); test_display(&[0xf3, 0x0f, 0x2a, 0xc1], "cvtsi2ss xmm0, ecx"); - test_display(&[0xf3, 0x0f, 0x2a, 0x01], "cvtsi2ss xmm0, [ecx]"); - test_display(&[0x0f, 0x2b, 0x00], "movntps [eax], xmm0"); + test_display(&[0xf3, 0x0f, 0x2a, 0x01], "cvtsi2ss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x2b, 0x00], "movntps xmmword [eax], xmm0"); test_display(&[0xf3, 0x0f, 0x2c, 0xc1], "cvttss2si eax, xmm1"); - test_display(&[0xf3, 0x0f, 0x2c, 0x01], "cvttss2si eax, [ecx]"); + test_display(&[0xf3, 0x0f, 0x2c, 0x01], "cvttss2si eax, dword [ecx]"); test_display(&[0xf3, 0x0f, 0x2d, 0xc1], "cvtss2si eax, xmm1"); - test_display(&[0xf3, 0x0f, 0x2d, 0x01], "cvtss2si eax, [ecx]"); - test_display(&[0x0f, 0x2e, 0x00], "ucomiss xmm0, [eax]"); - test_display(&[0x0f, 0x2f, 0x00], "comiss xmm0, [eax]"); + test_display(&[0xf3, 0x0f, 0x2d, 0x01], "cvtss2si eax, dword [ecx]"); + test_display(&[0x0f, 0x2e, 0x00], "ucomiss xmm0, dword [eax]"); + test_display(&[0x0f, 0x2f, 0x00], "comiss xmm0, dword [eax]"); test_display(&[0x0f, 0x28, 0xd0], "movaps xmm2, xmm0"); test_display(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0"); - test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [eax]"); - test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [eax]"); - test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [eax]"); - test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [eax]"); - test_display(&[0x67, 0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [bx + si]"); - test_display(&[0x66, 0x0f, 0x29, 0x00], "movapd [eax], xmm0"); + test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]"); + test_display(&[0x67, 0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [bx + si]"); + test_display(&[0x66, 0x0f, 0x29, 0x00], "movapd xmmword [eax], xmm0"); test_invalid(&[0x0f, 0x50, 0x00]); test_display(&[0x0f, 0x50, 0xc1], "movmskps eax, xmm1"); - test_display(&[0x0f, 0x51, 0x01], "sqrtps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x51, 0x01], "sqrtss xmm0, [ecx]"); - test_display(&[0x0f, 0x52, 0x01], "rsqrtps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x52, 0x01], "rsqrtss xmm0, [ecx]"); - test_display(&[0x0f, 0x53, 0x01], "rcpps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x53, 0x01], "rcpss xmm0, [ecx]"); + test_display(&[0x0f, 0x51, 0x01], "sqrtps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x51, 0x01], "sqrtss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x52, 0x01], "rsqrtps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x52, 0x01], "rsqrtss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x53, 0x01], "rcpps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x53, 0x01], "rcpss xmm0, dword [ecx]"); test_display(&[0xf3, 0x0f, 0x53, 0xc1], "rcpss xmm0, xmm1"); - test_display(&[0x0f, 0x54, 0x01], "andps xmm0, [ecx]"); - test_display(&[0x0f, 0x55, 0x01], "andnps xmm0, [ecx]"); - test_display(&[0x0f, 0x56, 0x01], "orps xmm0, [ecx]"); - test_display(&[0x0f, 0x57, 0x01], "xorps xmm0, [ecx]"); - test_display(&[0x0f, 0x58, 0x01], "addps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x58, 0x01], "addss xmm0, [ecx]"); - test_display(&[0x0f, 0x59, 0x01], "mulps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x59, 0x01], "mulss xmm0, [ecx]"); - test_display(&[0x0f, 0x5a, 0x01], "cvtps2pd xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x5a, 0x01], "cvtss2sd xmm0, [ecx]"); - test_display(&[0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x5b, 0x01], "cvttps2dq xmm0, [ecx]"); - test_display(&[0x67, 0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, [bx + di]"); - test_display(&[0x0f, 0x5c, 0x01], "subps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x5c, 0x01], "subss xmm0, [ecx]"); - test_display(&[0x0f, 0x5d, 0x01], "minps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x5d, 0x01], "minss xmm0, [ecx]"); - test_display(&[0x0f, 0x5e, 0x01], "divps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x5e, 0x01], "divss xmm0, [ecx]"); - test_display(&[0x0f, 0x5f, 0x01], "maxps xmm0, [ecx]"); - test_display(&[0xf3, 0x0f, 0x5f, 0x01], "maxss xmm0, [ecx]"); - - test_display(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, [eax], 0x7f"); + test_display(&[0x0f, 0x54, 0x01], "andps xmm0, xmmword [ecx]"); + test_display(&[0x0f, 0x55, 0x01], "andnps xmm0, xmmword [ecx]"); + test_display(&[0x0f, 0x56, 0x01], "orps xmm0, xmmword [ecx]"); + test_display(&[0x0f, 0x57, 0x01], "xorps xmm0, xmmword [ecx]"); + test_display(&[0x0f, 0x58, 0x01], "addps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x58, 0x01], "addss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x59, 0x01], "mulps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x59, 0x01], "mulss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x5a, 0x01], "cvtps2pd xmm0, qword [ecx]"); + test_display(&[0xf3, 0x0f, 0x5a, 0x01], "cvtss2sd xmm0, dword [ecx]"); + test_display(&[0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x5b, 0x01], "cvttps2dq xmm0, xmmword [ecx]"); + test_display(&[0x67, 0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [bx + di]"); + test_display(&[0x0f, 0x5c, 0x01], "subps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x5c, 0x01], "subss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x5d, 0x01], "minps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x5d, 0x01], "minss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x5e, 0x01], "divps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x5e, 0x01], "divss xmm0, dword [ecx]"); + test_display(&[0x0f, 0x5f, 0x01], "maxps xmm0, xmmword [ecx]"); + test_display(&[0xf3, 0x0f, 0x5f, 0x01], "maxss xmm0, dword [ecx]"); + + test_display(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [eax], 0x7f"); test_display(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0"); test_display(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0"); - test_display(&[0xf2, 0x0f, 0x10, 0x0c, 0xc6], "movsd xmm1, [esi + eax * 8]"); - test_display(&[0xf3, 0x0f, 0x10, 0x04, 0x86], "movss xmm0, [esi + eax * 4]"); + test_display(&[0xf2, 0x0f, 0x10, 0x0c, 0xc6], "movsd xmm1, qword [esi + eax * 8]"); + test_display(&[0xf3, 0x0f, 0x10, 0x04, 0x86], "movss xmm0, dword [esi + eax * 4]"); test_display(&[0xf2, 0x0f, 0x59, 0xc8], "mulsd xmm1, xmm0"); test_display(&[0xf3, 0x0f, 0x59, 0xc8], "mulss xmm1, xmm0"); test_display( &[0xf3, 0x0f, 0x6f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "movdqu xmm3, [esp + ebx * 4 - 0x334455cc]" + "movdqu xmm3, xmmword [esp + ebx * 4 - 0x334455cc]" ); test_display(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e"); test_display(&[0xf3, 0x0f, 0x7e, 0xc1], "movq xmm0, xmm1"); test_display( &[0xf3, 0x0f, 0x7f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc], - "movdqu [esp + ebx * 4 - 0x334455cc], xmm3" + "movdqu xmmword [esp + ebx * 4 - 0x334455cc], xmm3" ); test_display(&[0xf3, 0x0f, 0xc2, 0xc3, 0x08], "cmpss xmm0, xmm3, 0x8"); - test_display(&[0xf3, 0x0f, 0xc2, 0x03, 0x08], "cmpss xmm0, [ebx], 0x8"); + test_display(&[0xf3, 0x0f, 0xc2, 0x03, 0x08], "cmpss xmm0, dword [ebx], 0x8"); } // SETLE, SETNG, ... #[test] fn test_mov() { - test_display(&[0xa0, 0x93, 0x62, 0xc4, 0x00], "mov al, [0xc46293]"); - test_display(&[0x67, 0xa0, 0x93, 0x62], "mov al, [0x6293]"); - test_display(&[0xa1, 0x93, 0x62, 0xc4, 0x00], "mov eax, [0xc46293]"); - test_display(&[0x67, 0xa1, 0x93, 0x62], "mov eax, [0x6293]"); - test_display(&[0xa2, 0x93, 0x62, 0xc4, 0x00], "mov [0xc46293], al"); - test_display(&[0x67, 0xa2, 0x93, 0x62], "mov [0x6293], al"); - test_display(&[0xa3, 0x93, 0x62, 0xc4, 0x00], "mov [0xc46293], eax"); - test_display(&[0x67, 0xa3, 0x93, 0x62], "mov [0x6293], eax"); + test_display(&[0xa0, 0x93, 0x62, 0xc4, 0x00], "mov al, byte [0xc46293]"); + test_display(&[0x67, 0xa0, 0x93, 0x62], "mov al, byte [0x6293]"); + test_display(&[0xa1, 0x93, 0x62, 0xc4, 0x00], "mov eax, dword [0xc46293]"); + test_display(&[0x67, 0xa1, 0x93, 0x62], "mov eax, dword [0x6293]"); + test_display(&[0xa2, 0x93, 0x62, 0xc4, 0x00], "mov byte [0xc46293], al"); + test_display(&[0x67, 0xa2, 0x93, 0x62], "mov byte [0x6293], al"); + test_display(&[0xa3, 0x93, 0x62, 0xc4, 0x00], "mov dword [0xc46293], eax"); + test_display(&[0x67, 0xa3, 0x93, 0x62], "mov dword [0x6293], eax"); test_display(&[0xba, 0x01, 0x00, 0x00, 0x00], "mov edx, 0x1"); - test_display(&[0xc7, 0x04, 0x24, 0x00, 0x00, 0x00, 0x00], "mov [esp], 0x0"); - test_display(&[0x89, 0x44, 0x24, 0x08], "mov [esp + 0x8], eax"); - test_display(&[0x89, 0x43, 0x18], "mov [ebx + 0x18], eax"); - test_display(&[0xc7, 0x43, 0x10, 0x00, 0x00, 0x00, 0x00], "mov [ebx + 0x10], 0x0"); - test_display(&[0x89, 0x4e, 0x08], "mov [esi + 0x8], ecx"); - test_display(&[0x8b, 0x32], "mov esi, [edx]"); - test_display(&[0x8b, 0x4c, 0x10, 0xf8], "mov ecx, [eax + edx * 1 - 0x8]"); - test_display(&[0x89, 0x46, 0x10], "mov [esi + 0x10], eax"); + test_display(&[0xc7, 0x04, 0x24, 0x00, 0x00, 0x00, 0x00], "mov dword [esp], 0x0"); + test_display(&[0x89, 0x44, 0x24, 0x08], "mov dword [esp + 0x8], eax"); + test_display(&[0x89, 0x43, 0x18], "mov dword [ebx + 0x18], eax"); + test_display(&[0xc7, 0x43, 0x10, 0x00, 0x00, 0x00, 0x00], "mov dword [ebx + 0x10], 0x0"); + test_display(&[0x89, 0x4e, 0x08], "mov dword [esi + 0x8], ecx"); + test_display(&[0x8b, 0x32], "mov esi, dword [edx]"); + test_display(&[0x8b, 0x4c, 0x10, 0xf8], "mov ecx, dword [eax + edx * 1 - 0x8]"); + test_display(&[0x89, 0x46, 0x10], "mov dword [esi + 0x10], eax"); test_display(&[0x0f, 0x43, 0xec], "cmovnb ebp, esp"); test_display(&[0x0f, 0xb6, 0x06], "movzx eax, byte [esi]"); test_display(&[0x0f, 0xb7, 0x06], "movzx eax, word [esi]"); - test_display(&[0x89, 0x55, 0x94], "mov [ebp - 0x6c], edx"); - test_display(&[0x65, 0x89, 0x04, 0x25, 0xa8, 0x01, 0x00, 0x00], "mov gs:[0x1a8], eax"); + test_display(&[0x89, 0x55, 0x94], "mov dword [ebp - 0x6c], edx"); + test_display(&[0x65, 0x89, 0x04, 0x25, 0xa8, 0x01, 0x00, 0x00], "mov dword gs:[0x1a8], eax"); test_display(&[0x0f, 0xbe, 0x83, 0xb4, 0x00, 0x00, 0x00], "movsx eax, byte [ebx + 0xb4]"); - test_display(&[0xf3, 0x0f, 0x6f, 0x07], "movdqu xmm0, [edi]"); - test_display(&[0xf3, 0x0f, 0x7f, 0x45, 0x00], "movdqu [ebp], xmm0"); + test_display(&[0xf3, 0x0f, 0x6f, 0x07], "movdqu xmm0, xmmword [edi]"); + test_display(&[0xf3, 0x0f, 0x7f, 0x45, 0x00], "movdqu xmmword [ebp], xmm0"); test_display(&[0x0f, 0x97, 0xc0], "seta al"); test_display(&[0x0f, 0x97, 0xc8], "seta al"); - test_display(&[0x0f, 0x97, 0x00], "seta [eax]"); - test_display(&[0x0f, 0x97, 0x08], "seta [eax]"); + test_display(&[0x0f, 0x97, 0x00], "seta byte [eax]"); + test_display(&[0x0f, 0x97, 0x08], "seta byte [eax]"); // test_display(&[0xd6], "salc"); - test_display(&[0x8e, 0x00], "mov es, [eax]"); + test_display(&[0x8e, 0x00], "mov es, word [eax]"); // cs is not an allowed destination test_invalid(&[0x8e, 0x08]); - test_display(&[0x8e, 0x10], "mov ss, [eax]"); - test_display(&[0x8e, 0x18], "mov ds, [eax]"); - test_display(&[0x8e, 0x20], "mov fs, [eax]"); - test_display(&[0x8e, 0x28], "mov gs, [eax]"); + test_display(&[0x8e, 0x10], "mov ss, word [eax]"); + test_display(&[0x8e, 0x18], "mov ds, word [eax]"); + test_display(&[0x8e, 0x20], "mov fs, word [eax]"); + test_display(&[0x8e, 0x28], "mov gs, word [eax]"); test_invalid(&[0x8e, 0x30]); test_invalid(&[0x8e, 0x38]); } @@ -1062,10 +1060,10 @@ fn test_prefixes() { test_display(&[0x66, 0x32, 0xc0], "xor al, al"); test_display(&[0x66, 0x32, 0xc5], "xor al, ch"); test_invalid(&[0xf0, 0x33, 0xc0]); - test_display(&[0xf0, 0x31, 0x00], "lock xor [eax], eax"); - test_display(&[0xf0, 0x80, 0x30, 0x00], "lock xor [eax], 0x0"); - test_display(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc [edi], edx"); - test_display(&[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13], "lock btc cs:[ebx], dx"); + test_display(&[0xf0, 0x31, 0x00], "lock xor dword [eax], eax"); + test_display(&[0xf0, 0x80, 0x30, 0x00], "lock xor byte [eax], 0x0"); + test_display(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc dword [edi], edx"); + test_display(&[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13], "lock btc word cs:[ebx], dx"); test_invalid(&[0xf0, 0xc7, 0x00, 0x00, 0x00, 0x00]); test_display(&[0x0f, 0xc1, 0xcc], "xadd esp, ecx"); test_display(&[0x66, 0x0f, 0xc1, 0xcc], "xadd sp, cx"); @@ -1083,13 +1081,13 @@ fn test_control_flow() { test_display(&[0x72, 0x5a], "jb 0x5a"); test_display(&[0x0f, 0x86, 0x8b, 0x01, 0x00, 0x00], "jna 0x18b"); test_display(&[0x74, 0x47], "jz 0x47"); - test_display(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call [0x24727e]"); - test_display(&[0xff, 0x24, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "jmp [ecx * 8 + 0x1bca070]"); + test_display(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call dword [0x24727e]"); + test_display(&[0xff, 0x24, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "jmp dword [ecx * 8 + 0x1bca070]"); test_display(&[0xff, 0xe0], "jmp eax"); test_display(&[0x66, 0xff, 0xe0], "jmp eax"); test_display(&[0x67, 0xff, 0xe0], "jmp eax"); test_invalid(&[0xff, 0xd8]); - test_display(&[0xff, 0x18], "callf [eax]"); + test_display(&[0xff, 0x18], "callf far [eax]"); test_display(&[0xe0, 0x12], "loopnz 0x12"); test_display(&[0xe1, 0x12], "loopz 0x12"); test_display(&[0xe2, 0x12], "loop 0x12"); @@ -1112,7 +1110,7 @@ fn bad_instructions() { #[test] fn test_test_cmp() { - test_display(&[0xf6, 0x05, 0x2c, 0x9b, 0xff, 0xff, 0x01], "test [0xffff9b2c], 0x1"); + test_display(&[0xf6, 0x05, 0x2c, 0x9b, 0xff, 0xff, 0x01], "test byte [0xffff9b2c], 0x1"); test_display(&[0x3d, 0x01, 0xf0, 0xff, 0xff], "cmp eax, -0xfff"); test_display(&[0x83, 0xf8, 0xff], "cmp eax, -0x1"); test_display(&[0x39, 0xc6], "cmp esi, eax"); @@ -1123,8 +1121,8 @@ fn test_push_pop() { test_display(&[0x5b], "pop ebx"); test_display(&[0x5e], "pop esi"); test_display(&[0x68, 0x7f, 0x63, 0xc4, 0x00], "push 0xc4637f"); - test_display(&[0x66, 0x8f, 0x00], "pop [eax]"); - test_display(&[0x8f, 0x00], "pop [eax]"); + test_display(&[0x66, 0x8f, 0x00], "pop word [eax]"); + test_display(&[0x8f, 0x00], "pop dword [eax]"); } #[test] @@ -1142,16 +1140,16 @@ fn test_bmi1() { // ``` // just 0f38 - test_display_under(&bmi1, &[0xc4, 0xe2, 0x60, 0xf2, 0x01], "andn eax, ebx, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0xe0, 0xf2, 0x01], "andn eax, ebx, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x09], "blsr eax, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x09], "blsr eax, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x11], "blsmsk eax, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x11], "blsmsk eax, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x19], "blsi eax, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x19], "blsi eax, [ecx]"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0x60, 0xf7, 0x01], "bextr eax, [ecx], ebx"); - test_display_under(&bmi1, &[0xc4, 0xe2, 0xe0, 0xf7, 0x01], "bextr eax, [ecx], ebx"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0x60, 0xf2, 0x01], "andn eax, ebx, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0xe0, 0xf2, 0x01], "andn eax, ebx, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x09], "blsr eax, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x09], "blsr eax, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x11], "blsmsk eax, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x11], "blsmsk eax, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x19], "blsi eax, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x19], "blsi eax, dword [ecx]"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0x60, 0xf7, 0x01], "bextr eax, dword [ecx], ebx"); + test_display_under(&bmi1, &[0xc4, 0xe2, 0xe0, 0xf7, 0x01], "bextr eax, dword [ecx], ebx"); } #[test] @@ -1164,30 +1162,30 @@ fn test_bmi2() { // ``` // f2 0f3a - test_display_under(&bmi2, &[0xc4, 0xe3, 0x7b, 0xf0, 0x01, 0x05], "rorx eax, [ecx], 0x5"); - test_display_under(&bmi2, &[0xc4, 0xe3, 0xfb, 0xf0, 0x01, 0x05], "rorx eax, [ecx], 0x5"); + test_display_under(&bmi2, &[0xc4, 0xe3, 0x7b, 0xf0, 0x01, 0x05], "rorx eax, dword [ecx], 0x5"); + test_display_under(&bmi2, &[0xc4, 0xe3, 0xfb, 0xf0, 0x01, 0x05], "rorx eax, dword [ecx], 0x5"); // f2 0f38 map - test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf5, 0x07], "pdep eax, ebx, [edi]"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf5, 0x07], "pdep eax, ebx, [edi]"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf6, 0x07], "mulx eax, ebx, [edi]"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf6, 0x07], "mulx eax, ebx, [edi]"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf7, 0x01], "shrx eax, [ecx], ebx"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf7, 0x01], "shrx eax, [ecx], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf5, 0x07], "pdep eax, ebx, dword [edi]"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf5, 0x07], "pdep eax, ebx, dword [edi]"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf6, 0x07], "mulx eax, ebx, dword [edi]"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf6, 0x07], "mulx eax, ebx, dword [edi]"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf7, 0x01], "shrx eax, dword [ecx], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf7, 0x01], "shrx eax, dword [ecx], ebx"); // f3 0f38 map - test_display_under(&bmi2, &[0xc4, 0xe2, 0x62, 0xf5, 0x07], "pext eax, ebx, [edi]"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0xe2, 0xf5, 0x07], "pext eax, ebx, [edi]"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0x62, 0xf7, 0x01], "sarx eax, [ecx], ebx"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0xe2, 0xf7, 0x01], "sarx eax, [ecx], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0x62, 0xf5, 0x07], "pext eax, ebx, dword [edi]"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0xe2, 0xf5, 0x07], "pext eax, ebx, dword [edi]"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0x62, 0xf7, 0x01], "sarx eax, dword [ecx], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0xe2, 0xf7, 0x01], "sarx eax, dword [ecx], ebx"); // just 0f38 - test_display_under(&bmi2, &[0xc4, 0xe2, 0x60, 0xf5, 0x07], "bzhi eax, [edi], ebx"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0xe0, 0xf5, 0x07], "bzhi eax, [edi], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0x60, 0xf5, 0x07], "bzhi eax, dword [edi], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0xe0, 0xf5, 0x07], "bzhi eax, dword [edi], ebx"); // 66 0f38 - test_display_under(&bmi2, &[0xc4, 0xe2, 0x61, 0xf7, 0x01], "shlx eax, [ecx], ebx"); - test_display_under(&bmi2, &[0xc4, 0xe2, 0xe1, 0xf7, 0x01], "shlx eax, [ecx], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0x61, 0xf7, 0x01], "shlx eax, dword [ecx], ebx"); + test_display_under(&bmi2, &[0xc4, 0xe2, 0xe1, 0xf7, 0x01], "shlx eax, dword [ecx], ebx"); } #[test] @@ -1203,8 +1201,8 @@ fn test_popcnt() { #[test] fn test_bitwise() { test_display_under(&InstDecoder::minimal(), &[0x0f, 0xbc, 0xd3], "bsf edx, ebx"); - test_display_under(&InstDecoder::minimal(), &[0x0f, 0xbb, 0x17], "btc [edi], edx"); - test_display_under(&InstDecoder::minimal(), &[0xf0, 0x0f, 0xbb, 0x17], "lock btc [edi], edx"); + test_display_under(&InstDecoder::minimal(), &[0x0f, 0xbb, 0x17], "btc dword [edi], edx"); + test_display_under(&InstDecoder::minimal(), &[0xf0, 0x0f, 0xbb, 0x17], "lock btc dword [edi], edx"); test_display(&[0x0f, 0xa3, 0xd0], "bt eax, edx"); test_display(&[0x0f, 0xab, 0xd0], "bts eax, edx"); test_display(&[0x0f, 0xb3, 0xd0], "btr eax, edx"); @@ -1224,10 +1222,10 @@ fn test_misc() { test_display(&[0xcf], "iretd"); test_display(&[0xf2, 0x0f, 0x38, 0xf0, 0xc1], "crc32 eax, cl"); test_display(&[0xf2, 0x0f, 0x38, 0xf1, 0xc1], "crc32 eax, ecx"); - test_display(&[0xfe, 0x00], "inc [eax]"); // TODO: inc byte [eax] - test_display(&[0xfe, 0x08], "dec [eax]"); // TODO: dec byte [eax] - test_display(&[0xff, 0x00], "inc [eax]"); // TODO: inc dword [eax] - test_display(&[0xff, 0x08], "dec [eax]"); // TODO: inc qword [eax] + test_display(&[0xfe, 0x00], "inc byte [eax]"); + test_display(&[0xfe, 0x08], "dec byte [eax]"); + test_display(&[0xff, 0x00], "inc dword [eax]"); + test_display(&[0xff, 0x08], "dec dword [eax]"); test_display(&[0xe4, 0x99], "in al, 0x99"); test_display(&[0xe5, 0x99], "in eax, 0x99"); test_display(&[0x67, 0xe5, 0x99], "in eax, 0x99"); @@ -1243,54 +1241,53 @@ fn test_misc() { test_display(&[0x9c], "pushf"); test_display(&[0x98], "cwde"); test_display(&[0x66, 0x99], "cwd"); - test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop cs:[eax + eax * 1]"); - test_display(&[0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00], "nop [eax + eax * 1]"); - test_display(&[0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12], "lea esp, [edi + eax * 8 + 0x12000020]"); + test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop word cs:[eax + eax * 1]"); + test_display(&[0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00], "nop word [eax + eax * 1]"); + test_display(&[0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12], "lea esp, dword [edi + eax * 8 + 0x12000020]"); test_display(&[0x33, 0xc0], "xor eax, eax"); - test_display(&[0x8d, 0x53, 0x08], "lea edx, [ebx + 0x8]"); + test_display(&[0x8d, 0x53, 0x08], "lea edx, dword [ebx + 0x8]"); test_invalid(&[0x8d, 0xdd]); test_display(&[0x31, 0xc9], "xor ecx, ecx"); test_display(&[0x29, 0xc8], "sub eax, ecx"); - test_display(&[0x03, 0x0b], "add ecx, [ebx]"); - test_display(&[0x8d, 0x0c, 0x12], "lea ecx, [edx + edx * 1]"); + test_display(&[0x03, 0x0b], "add ecx, dword [ebx]"); + test_display(&[0x8d, 0x0c, 0x12], "lea ecx, dword [edx + edx * 1]"); test_display(&[0xf6, 0xc2, 0x18], "test dl, 0x18"); - test_display(&[0xf3, 0xab], "rep stos es:[edi], eax"); - test_display(&[0xf3, 0xa5], "rep movs es:[edi], ds:[esi]"); + test_display(&[0xf3, 0xab], "rep stos dword es:[edi], eax"); + test_display(&[0xf3, 0xa5], "rep movs dword es:[edi], dword ds:[esi]"); test_display(&[0xf3, 0x0f, 0xbc, 0xd7], "tzcnt edx, edi"); + // TODO: // this is actually vmx // test_invalid(&[0x66, 0x0f, 0xc7, 0x03]); - test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear [ebx]"); - test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon [ebx]"); + test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [ebx]"); + test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [ebx]"); - test_display(&[0xf3, 0x0f, 0xae, 0x26], "ptwrite [esi]"); + test_display(&[0xf3, 0x0f, 0xae, 0x26], "ptwrite dword [esi]"); test_display(&[0xf3, 0x0f, 0xae, 0xe6], "ptwrite esi"); test_invalid(&[0x66, 0xf3, 0x0f, 0xae, 0xe6]); test_display(&[0xf3, 0x0f, 0xae, 0xc4], "rdfsbase esp"); test_display(&[0xf3, 0x0f, 0xae, 0xcc], "rdgsbase esp"); test_display(&[0xf3, 0x0f, 0xae, 0xd4], "wrfsbase esp"); test_display(&[0xf3, 0x0f, 0xae, 0xdc], "wrgsbase esp"); - test_display(&[0x66, 0x0f, 0xae, 0x3f], "clflushopt [edi]"); // or clflush without 66 + test_display(&[0x66, 0x0f, 0xae, 0x3f], "clflushopt zmmword [edi]"); // or clflush without 66 test_invalid(&[0x66, 0x0f, 0xae, 0xff]); - test_display(&[0x66, 0x0f, 0xae, 0x37], "clwb [edi]"); + test_display(&[0x66, 0x0f, 0xae, 0x37], "clwb zmmword [edi]"); test_display(&[0x66, 0x0f, 0xae, 0xf7], "tpause edi"); test_display(&[0xf3, 0x0f, 0xae, 0xf1], "umonitor ecx"); test_display(&[0xf2, 0x0f, 0xae, 0xf1], "umwait ecx"); - test_display(&[0x66, 0x0f, 0x38, 0x80, 0x2f], "invept ebp, [edi]"); + test_display(&[0x66, 0x0f, 0x38, 0x80, 0x2f], "invept ebp, xmmword [edi]"); test_invalid(&[0x0f, 0x38, 0x80, 0x2f]); - test_display(&[0x66, 0x0f, 0x38, 0x81, 0x2f], "invvpid ebp, [edi]"); + test_display(&[0x66, 0x0f, 0x38, 0x81, 0x2f], "invvpid ebp, xmmword [edi]"); test_invalid(&[0x0f, 0x38, 0x81, 0x2f]); - test_display(&[0x66, 0x0f, 0x38, 0x82, 0x2f], "invpcid ebp, [edi]"); + test_display(&[0x66, 0x0f, 0x38, 0x82, 0x2f], "invpcid ebp, xmmword [edi]"); test_invalid(&[0x0f, 0x38, 0x82, 0x2f]); test_display(&[0x66, 0x0f, 0xae, 0xf1], "tpause ecx"); } #[test] -#[ignore] -// TODO also not supported at all fn evex() { - test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa zmm0, [eax + eax*2 + 0x40]"); - test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa xmm0, [eax + eax*2 + 0x10]"); + test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa zmm0, zmmword [eax + eax * 2 + 0x40]"); + test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa xmm0, xmmword [eax + eax * 2 + 0x10]"); } #[test] @@ -1301,10 +1298,16 @@ fn test_vex() { test_invalid_under(&InstDecoder::minimal(), bytes); } - fn test_valid(bytes: &[u8], text: &'static str) { - test_display_under(&InstDecoder::minimal().with_avx(), bytes, text); + fn test_avx2(bytes: &[u8], text: &'static str) { + test_display_under(&InstDecoder::minimal().with_avx().with_avx2(), bytes, text); test_display_under(&InstDecoder::default(), bytes, text); - test_display_under(&InstDecoder::minimal(), bytes, text); + test_invalid_under(&InstDecoder::minimal(), bytes); + } + + fn test_instr_vex_aesni(bytes: &[u8], text: &'static str) { + test_display_under(&InstDecoder::minimal().with_avx().with_aesni(), bytes, text); + test_display_under(&InstDecoder::default(), bytes, text); + test_invalid_under(&InstDecoder::minimal(), bytes); } fn test_instr_invalid(bytes: &[u8]) { @@ -1312,141 +1315,893 @@ fn test_vex() { test_invalid_under(&InstDecoder::default(), bytes); } - test_instr(&[0xc5, 0xf8, 0x10, 0x00], "vmovups xmm0, [eax]"); - test_instr(&[0xc5, 0xf8, 0x10, 0x01], "vmovups xmm0, [ecx]"); - test_valid(&[0xc5, 0x78, 0x10], "lds edi, [eax + 0x10]"); + // prefix 03 + test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x00, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x00, 0b11_001_010, 0x77]); + test_avx2(&[0xc4, 0b110_00011, 0b1_1111_101, 0x00, 0b11_001_010, 0x77], "vpermq ymm1, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x01, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x01, 0b11_001_010, 0x77]); + test_avx2(&[0xc4, 0b110_00011, 0b1_1111_101, 0x01, 0b11_001_010, 0x77], "vpermpd ymm1, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x02, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x02, 0b11_001_010, 0x77]); + test_avx2(&[0xc4, 0b110_00011, 0b0_1111_001, 0x02, 0b11_001_010, 0x77], "vpblendd xmm1, xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00011, 0b0_1111_001, 0x02, 0b00_001_010, 0x77], "vpblendd xmm1, xmm0, xmmword [edx], 0x77"); + test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x02, 0b11_001_010, 0x77], "vpblendd ymm1, ymm0, ymm2, 0x77"); + test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x02, 0b00_001_010, 0x77], "vpblendd ymm1, ymm0, ymmword [edx], 0x77"); + + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x04, 0b11_001_010, 0x77], "vpermilps xmm1, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x04, 0b11_001_010, 0x77], "vpermilps ymm1, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x05, 0b11_001_010, 0x77], "vpermilpd xmm1, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x05, 0b11_001_010, 0x77], "vpermilpd ymm1, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x06, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x06, 0b11_001_010, 0x77], "vperm2f128 ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x06, 0b00_001_010, 0x77], "vperm2f128 ymm1, ymm0, ymmword [edx], 0x77"); + + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0c, 0b11_001_010, 0x77], "vblendps xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0c, 0b11_001_010, 0x77], "vblendps ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0d, 0b11_001_010, 0x77], "vblendpd xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0d, 0b11_001_010, 0x77], "vblendpd ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0e, 0b11_001_010, 0x77], "vpblendw xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0e, 0b11_001_010, 0x77], "vpblendw ymm1, ymm0, ymm2, 0x77"); + + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x08, 0b11_001_010, 0x77], "vroundps xmm1, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x08, 0b11_001_010, 0x77], "vroundps ymm1, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x08, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x08, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x09, 0b11_001_010, 0x77], "vroundpd xmm1, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x09, 0b11_001_010, 0x77], "vroundpd ymm1, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x09, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x09, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0a, 0b11_001_010, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0a, 0b11_001_010, 0x77], "vroundss ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0b, 0b11_001_010, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0b, 0b11_001_010, 0x77], "vroundsd ymm1, ymm0, ymm2, 0x77"); + + test_instr(&[0xc4, 0b110_00011, 0b1_0111_001, 0x0f, 0b11_001_010, 0x77], "vpalignr xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b1_0111_101, 0x0f, 0b11_001_010, 0x77], "vpalignr ymm1, ymm0, ymm2, 0x77"); + + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x14, 0b11_001_010, 0x77], "vpextrb edxd, xmm1, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x14, 0b00_001_010, 0x77], "vpextrb byte [edx], xmm1, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x14, 0b00_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x14, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x15, 0b11_001_010, 0x77], "vpextrw edxd, xmm1, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x15, 0b00_001_010, 0x77], "vpextrw word [edx], xmm1, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x15, 0b00_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x15, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x16, 0b11_001_010, 0x77], "vpextrd edxd, xmm1, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x16, 0b00_001_010, 0x77], "vpextrd dword [edx], xmm1, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x16, 0b00_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x16, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b1_1111_001, 0x16, 0b11_001_010, 0x77], "vpextrq edx, xmm1, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x16, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b1_1111_001, 0x16, 0b00_001_010, 0x77], "vpextrq qword [edx], xmm1, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x17, 0b11_001_010, 0x77], "vextractps edxd, xmm1, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x17, 0b00_001_010, 0x77], "vextractps dword [edx], xmm1, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x17, 0b00_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x17, 0b00_001_010, 0x77]); + + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x18, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x18, 0b11_001_010, 0x77], "vinsertf128 ymm1, ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x18, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x19, 0b11_001_010, 0x77], "vextractf128 xmm2, ymm1, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]); + + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x18, 0b11_001_010, 0x77]); + test_avx2(&[0xc4, 0b110_00011, 0b0_0111_101, 0x38, 0b11_001_010, 0x77], "vinserti128 ymm1, ymm0, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x18, 0b11_001_010, 0x77]); + test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x39, 0b11_001_010, 0x77], "vextracti128 xmm2, ymm1, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]); + + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x20, 0b11_001_010, 0x77], "vpinsrb xmm1, xmm0, edxd, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x20, 0b00_001_010, 0x77], "vpinsrb xmm1, xmm0, byte [edx], 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x20, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x21, 0b11_001_010, 0x77], "vinsertps xmm1, xmm0, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x21, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x22, 0b11_001_010, 0x77], "vpinsrd xmm1, xmm0, edxd, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x22, 0b00_001_010, 0x77], "vpinsrd xmm1, xmm0, dword [edx], 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x22, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b1_0111_001, 0x22, 0b11_001_010, 0x77], "vpinsrq xmm1, xmm0, edx, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b1_0111_001, 0x22, 0b00_001_010, 0x77], "vpinsrq xmm1, xmm0, qword [edx], 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x22, 0b00_001_010, 0x77]); + + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x40, 0b11_001_010, 0x77], "vdpps xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x40, 0b11_001_010, 0x77], "vdpps ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x41, 0b11_001_010, 0x77], "vdppd xmm1, xmm0, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x41, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x42, 0b11_001_010, 0x77], "vmpsadbw xmm1, xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00011, 0b0_0111_101, 0x42, 0b11_001_010, 0x77], "vmpsadbw ymm1, ymm0, ymm2, 0x77"); + + test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x46, 0b11_001_010, 0x77], "vperm2i128 ymm1, ymm0, ymm2, 0x77"); + test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x46, 0b00_001_010, 0x77], "vperm2i128 ymm1, ymm0, ymmword [edx], 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x46, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x46, 0b11_001_010, 0x77]); + + test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x4c, 0b11_001_010, 0x77], "vpblendvb xmm1, xmm0, xmm2, xmm7"); + test_avx2(&[0xc4, 0b110_00011, 0b0_0111_101, 0x4c, 0b11_001_010, 0x77], "vpblendvb ymm1, ymm0, ymm2, ymm7"); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x4c, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x4c, 0b11_001_010, 0x77]); + + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x60, 0b11_001_010, 0x77], "vpcmpestrm xmm1, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x60, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x60, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x60, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x61, 0b11_001_010, 0x77], "vpcmpestri xmm1, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x61, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x61, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x61, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x62, 0b11_001_010, 0x77], "vpcmpistrm xmm1, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x62, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x62, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x62, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x63, 0b11_001_010, 0x77], "vpcmpistri xmm1, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x63, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x63, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x63, 0b11_001_010, 0x77]); + + test_instr_vex_aesni(&[0xc4, 0b110_00011, 0b1_1111_001, 0xdf, 0b11_001_010, 0x77], "vaeskeygenassist xmm1, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0xdf, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0xdf, 0b11_001_010, 0x77]); + + // prefix 02 + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x00, 0b11_001_010], "vpshufb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x00, 0b11_001_010], "vpshufb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x01, 0b11_001_010], "vphaddw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x01, 0b11_001_010], "vphaddw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x02, 0b11_001_010], "vphaddd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x02, 0b11_001_010], "vphaddd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x03, 0b11_001_010], "vphaddsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x03, 0b11_001_010], "vphaddsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x04, 0b11_001_010], "vpmaddubsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x04, 0b11_001_010], "vpmaddubsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x05, 0b11_001_010], "vphsubw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x05, 0b11_001_010], "vphsubw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x06, 0b11_001_010], "vphsubd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x06, 0b11_001_010], "vphsubd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x07, 0b11_001_010], "vphsubsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x07, 0b11_001_010], "vphsubsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x08, 0b11_001_010], "vpsignb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x08, 0b11_001_010], "vpsignb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x09, 0b11_001_010], "vpsignw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x09, 0b11_001_010], "vpsignw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0a, 0b11_001_010], "vpsignd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0a, 0b11_001_010], "vpsignd ymm1, ymm0, ymm2"); + + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0b, 0b11_001_010], "vpmulhrsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0b, 0b11_001_010], "vpmulhrsw ymm1, ymm0, ymm2"); + + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x0c, 0b11_001_010], "vpermilps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_101, 0x0c, 0b11_001_010], "vpermilps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x0d, 0b11_001_010], "vpermilpd xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_101, 0x0d, 0b11_001_010], "vpermilpd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0e, 0b11_001_010], "vtestps xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0e, 0b11_001_010], "vtestps ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0f, 0b11_001_010], "vtestpd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0f, 0b11_001_010], "vtestpd ymm1, ymm2"); + + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x16, 0b11_001_010], "vpermps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x16, 0b00_001_010], "vpermps ymm1, ymm0, ymmword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x16, 0b00_011_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x16, 0b00_011_010]); + + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x17, 0b11_001_010], "vptest xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x17, 0b11_001_010], "vptest ymm1, ymm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x17, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x17, 0b11_001_010]); + + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x18, 0b00_001_010], "vbroadcastss xmm1, dword [edx]"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b00_001_010], "vbroadcastss ymm1, dword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b1_1111_001, 0x18, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x18, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b00_001_010], "vbroadcastsd ymm1, qword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x19, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1a, 0b00_001_010], "vbroadcastf128 ymm1, xmmword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b00_001_010], "vbroadcasti128 ymm1, xmmword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x5a, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x5a, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x18, 0b11_001_010], "vbroadcastss xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b11_001_010], "vbroadcastss ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b00_001_010], "vbroadcastss ymm1, dword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x18, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x18, 0b11_001_010]); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b11_001_010], "vbroadcastsd ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b00_001_010], "vbroadcastsd ymm1, qword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x19, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x19, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b11_001_010]); + + + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x1c, 0b11_001_010], "vpabsb xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1c, 0b11_001_010], "vpabsb ymm1, ymm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1c, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x1d, 0b11_001_010], "vpabsw xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1d, 0b11_001_010], "vpabsw ymm1, ymm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1d, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x1e, 0b11_001_010], "vpabsd xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1e, 0b11_001_010], "vpabsd ymm1, ymm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1e, 0b11_001_010]); + + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x20, 0b11_001_010], "vpmovsxbw xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x20, 0b11_001_010], "vpmovsxbw ymm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x20, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x21, 0b11_001_010], "vpmovsxbd xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x21, 0b11_001_010], "vpmovsxbd ymm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x21, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x22, 0b11_001_010], "vpmovsxbq xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x22, 0b11_001_010], "vpmovsxbq ymm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x22, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x23, 0b11_001_010], "vpmovsxwd xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x23, 0b11_001_010], "vpmovsxwd ymm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x23, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x24, 0b11_001_010], "vpmovsxwq xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x24, 0b11_001_010], "vpmovsxwq ymm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x24, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x25, 0b11_001_010], "vpmovsxdq xmm1, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x25, 0b11_001_010], "vpmovsxdq ymm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x25, 0b11_001_010]); + + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x28, 0b11_001_010], "vpmuldq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x28, 0b11_001_010], "vpmuldq ymm1, ymm0, ymm2"); + + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x29, 0b11_001_010], "vpcmpeqq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x29, 0b11_001_010], "vpcmpeqq ymm1, ymm0, ymm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x2a, 0b00_001_010], "vmovntdqa xmm1, xmmword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b00_001_010]); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x2a, 0b00_001_010], "vmovntdqa ymm1, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2b, 0b11_001_010], "vpackusdw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2b, 0b11_001_010], "vpackusdw ymm1, ymm0, ymm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2b, 0b00_001_010], "vpackusdw ymm1, ymm0, ymmword [edx]"); + + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x30, 0b11_001_010], "vpmovzxbw xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x30, 0b11_001_010], "vpmovzxbw ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x31, 0b11_001_010], "vpmovzxbd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x31, 0b11_001_010], "vpmovzxbd ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x32, 0b11_001_010], "vpmovzxbq xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x32, 0b11_001_010], "vpmovzxbq ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x33, 0b11_001_010], "vpmovzxwd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x33, 0b11_001_010], "vpmovzxwd ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x34, 0b11_001_010], "vpmovzxwq xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x34, 0b11_001_010], "vpmovzxwq ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x35, 0b11_001_010], "vpmovzxdq xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x35, 0b11_001_010], "vpmovzxdq ymm1, xmm2"); + + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x30, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x30, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x31, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x31, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x32, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x32, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x33, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x33, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x34, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x34, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x35, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x35, 0b11_001_010]); + + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x36, 0b11_001_010]); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x36, 0b11_001_010], "vpermd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x37, 0b11_001_010], "vpcmpgtq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x37, 0b11_001_010], "vpcmpgtq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x38, 0b11_001_010], "vpminsb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x38, 0b11_001_010], "vpminsb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x39, 0b11_001_010], "vpminsd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x39, 0b11_001_010], "vpminsd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3a, 0b11_001_010], "vpminuw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3a, 0b11_001_010], "vpminuw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3b, 0b11_001_010], "vpminud xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3b, 0b11_001_010], "vpminud ymm1, ymm0, ymm2"); + + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3c, 0b11_001_010], "vpmaxsb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3c, 0b11_001_010], "vpmaxsb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3d, 0b11_001_010], "vpmaxsd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3d, 0b11_001_010], "vpmaxsd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3e, 0b11_001_010], "vpmaxuw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3e, 0b11_001_010], "vpmaxuw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3f, 0b11_001_010], "vpmaxud xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3f, 0b11_001_010], "vpmaxud ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x40, 0b11_001_010], "vpmulld xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x40, 0b11_001_010], "vpmulld ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x41, 0b11_001_010], "vphminposuw xmm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x41, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x41, 0b11_001_010]); +// TODO: should something b11at opcode 42 here? +// test_instr(&[0xc4, 0b110_00010, 0b1_0111_001, 0x42, 0b11_001_010], "vphminposuw xmm"); +// test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x41, 0b11_001_010]); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x45, 0b00_001_010], "vpsrlvd xmm1, xmm0, xmmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x45, 0b00_001_010], "vpsrlvd ymm1, ymm0, ymmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x45, 0b11_001_010], "vpsrlvd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x45, 0b11_001_010], "vpsrlvd ymm1, ymm0, ymm2"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x45, 0b00_001_010], "vpsrlvq xmm1, xmm0, xmmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x45, 0b00_001_010], "vpsrlvq ymm1, ymm0, ymmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x45, 0b11_001_010], "vpsrlvq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x45, 0b11_001_010], "vpsrlvq ymm1, ymm0, ymm2"); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x46, 0b00_001_010], "vpsravd xmm1, xmm0, xmmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x46, 0b00_001_010], "vpsravd ymm1, ymm0, ymmword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b1_1111_001, 0x46, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x46, 0b00_001_010]); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x47, 0b00_001_010], "vpsllvd xmm1, xmm0, xmmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x47, 0b00_001_010], "vpsllvd ymm1, ymm0, ymmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x47, 0b11_001_010], "vpsllvd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x47, 0b11_001_010], "vpsllvd ymm1, ymm0, ymm2"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x47, 0b00_001_010], "vpsllvq xmm1, xmm0, xmmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x47, 0b00_001_010], "vpsllvq ymm1, ymm0, ymmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x47, 0b11_001_010], "vpsllvq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x47, 0b11_001_010], "vpsllvq ymm1, ymm0, ymm2"); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b00_001_010], "vpmaskmovd xmm1, xmm0, xmmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x8c, 0b00_001_010], "vpmaskmovd ymm1, ymm0, ymmword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x8c, 0b00_001_010], "vpmaskmovq xmm1, xmm0, xmmword [edx]"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x8c, 0b00_001_010], "vpmaskmovq ymm1, ymm0, ymmword [edx]"); + test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b00_001_010], "vpmaskmovd xmmword [edx], xmm0, xmm1"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x8e, 0b00_001_010], "vpmaskmovd ymmword [edx], ymm0, ymm1"); + test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x8e, 0b00_001_010], "vpmaskmovq xmmword [edx], xmm0, xmm1"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x8e, 0b00_001_010], "vpmaskmovq ymmword [edx], ymm0, ymm1"); + test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x90, 0b00_000_100, 0xa1], "vpgatherdd xmm0, dword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x90, 0b00_000_100, 0xa1], "vpgatherdd ymm0, dword [ecx + ymm12 * 4], ymm0"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x90, 0b00_000_100, 0xa1], "vpgatherdq xmm0, dword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x90, 0b00_000_100, 0xa1], "vpgatherdq ymm0, qword [ecx + ymm12 * 4], ymm0"); + + test_avx2(&[0xc4, 0b000_00010, 0b0_1111_001, 0x91, 0b00_000_100, 0xa1], "vpgatherqd xmm0, dword xmmword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b000_00010, 0b0_1111_101, 0x91, 0b00_000_100, 0xa1], "vpgatherqd xmm0, dword xmmword [ecx + ymm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b000_00010, 0b1_1111_001, 0x91, 0b00_000_100, 0xa1], "vpgatherqq xmm0, dword xmmword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b000_00010, 0b1_1111_101, 0x91, 0b00_000_100, 0xa1], "vpgatherqq ymm0, qword xmmword [ecx + ymm12 * 4], ymm0"); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x92, 0b00_000_100, 0xa1], "vgatherdps xmm0, dword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x92, 0b00_000_100, 0xa1], "vgatherdps ymm0, qword [ecx + ymm12 * 4], ymm0"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x92, 0b00_000_100, 0xa1], "vgatherdpd xmm0, dword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x92, 0b00_000_100, 0xa1], "vgatherdpd ymm0, qword [ecx + ymm12 * 4], ymm0"); + + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x93, 0b00_000_100, 0xa1], "vgatherqps xmm0, dword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x93, 0b00_000_100, 0xa1], "vgatherqps ymm0, qword [ecx + ymm12 * 4], ymm0"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x93, 0b00_000_100, 0xa1], "vgatherqpd xmm0, dword [ecx + xmm12 * 4], xmm0"); + test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x93, 0b00_000_100, 0xa1], "vgatherqpd ymm0, qword [ecx + ymm12 * 4], ymm0"); + + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b0_1111_001, 0xdb, 0b11_001_010], "vaesimc xmm1, xmm2"); + test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0xdb, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdb, 0b11_001_010]); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xdc, 0b11_001_010], "vaesenc xmm1, xmm0, xmm2"); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdc, 0b11_001_010], "vaesenc ymm1, ymm0, ymm2"); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xdd, 0b11_001_010], "vaesenclast xmm1, xmm0, xmm2"); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdd, 0b11_001_010], "vaesenclast ymm1, ymm0, ymm2"); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xde, 0b11_001_010], "vaesdec xmm1, xmm0, xmm2"); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xde, 0b11_001_010], "vaesdec ymm1, ymm0, ymm2"); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xdf, 0b11_001_010], "vaesdeclast xmm1, xmm0, xmm2"); + test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdf, 0b11_001_010], "vaesdeclast ymm1, ymm0, ymm2"); + + // prefix 01 + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x10, 0b00_001_010], "vmovsd xmm1, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x10, 0b00_001_010], "vmovsd xmm1, qword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0x10, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x10, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x10, 0b00_001_010], "vmovupd xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x10, 0b00_001_010], "vmovupd ymm1, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x11, 0b00_001_010], "vmovsd qword [edx], xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x11, 0b00_001_010], "vmovsd qword [edx], xmm1"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x10, 0b00_001_010], "vmovupd xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x10, 0b00_001_010], "vmovupd ymm1, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x10, 0b00_001_010], "vmovss xmm1, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x10, 0b00_001_010], "vmovss xmm1, dword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_010, 0x10, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_110, 0x10, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x10, 0b00_001_010], "vmovups xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x10, 0b00_001_010], "vmovups ymm1, ymmword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b11_001_010], "vmovsd xmm2, xmm0, xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b11_001_010], "vmovsd xmm2, xmm0, xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x11, 0b00_001_010], "vmovss dword [edx], xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x11, 0b00_001_010], "vmovss dword [edx], xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x11, 0b00_001_010], "vmovups xmmword [edx], xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x11, 0b00_001_010], "vmovups ymmword [edx], ymm1"); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x12, 0b00_001_010], "vmovddup xmm1, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x12, 0b00_001_010], "vmovddup ymm1, ymmword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_011, 0x12, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_111, 0x12, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x12, 0b11_001_010], "vmovhlps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x12, 0b00_001_010], "vmovlps xmm1, xmm0, dword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x12, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x12, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x12, 0b00_001_010], "vmovsldup xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x12, 0b00_001_010], "vmovsldup ymm1, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x12, 0b00_001_010], "vmovsldup xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x12, 0b00_001_010], "vmovsldup ymm1, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x12, 0b00_001_010], "vmovlpd xmm1, xmm0, qword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x12, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x13, 0b00_001_010], "vmovlpd qword [edx], xmm1"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x13, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x13, 0b00_001_010]); + + test_instr(&[0xc4, 0b110_00001, 0b0_0111_000, 0x14, 0b00_001_010], "vunpcklps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_100, 0x14, 0b00_001_010], "vunpcklps ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x14, 0b00_001_010], "vunpcklpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0x14, 0b00_001_010], "vunpcklpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_000, 0x15, 0b00_001_010], "vunpckhps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_100, 0x15, 0b00_001_010], "vunpckhps ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x15, 0b00_001_010], "vunpckhpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0x15, 0b00_001_010], "vunpckhpd ymm1, ymm0, ymmword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x16, 0b11_001_010], "vmovshdup xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x16, 0b11_001_010], "vmovshdup ymm1, ymm2"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_010, 0x16, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_110, 0x16, 0b11_001_010]); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x16, 0b00_001_010], "vmovhps xmm1, xmm0, qword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x16, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b00_001_010], "vmovhpd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x16, 0b00_001_010], "vmovhpd xmm1, xmm0, qword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x17, 0b00_001_010], "vmovhps qword [edx], xmm1"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x17, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_000, 0x17, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x17, 0b00_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x17, 0b00_001_010], "vmovhpd qword [edx], xmm1"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x17, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x17, 0b00_001_010]); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x28, 0b11_001_010], "vmovaps xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x28, 0b11_001_010], "vmovaps ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x29, 0b11_001_010], "vmovaps xmm2, xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x29, 0b11_001_010], "vmovaps ymm2, ymm1"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x28, 0b11_001_010], "vmovapd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x28, 0b11_001_010], "vmovapd ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x29, 0b11_001_010], "vmovapd xmm2, xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x29, 0b11_001_010], "vmovapd ymm2, ymm1"); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edxd"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2a, 0b00_001_010], "vcvtsi2ss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x2a, 0b00_001_010], "vcvtsi2ss xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edxd"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edxd"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2a, 0b00_001_010], "vcvtsi2sd xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x2a, 0b00_001_010], "vcvtsi2sd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc5, 0b1_1111_011, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"); + test_instr(&[0xc5, 0b1_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b00_001_010], "vmovntps xmmword [edx], xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b00_001_010], "vmovntps ymmword [edx], ymm1"); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b11_001_010]); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b00_001_010], "vmovntpd xmmword [edx], xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b00_001_010], "vmovntpd ymmword [edx], ymm1"); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"); + test_instr(&[0xc5, 0b1_1111_010, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"); + test_instr(&[0xc5, 0b1_1111_010, 0x2c, 0b00_001_010], "vcvttss2si ecx, dword [edx]"); + test_instr(&[0xc5, 0b1_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, dword [edx]"); + test_instr(&[0xc5, 0b1_1111_011, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"); + test_instr(&[0xc5, 0b1_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"); + test_instr(&[0xc5, 0b1_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]"); + test_instr(&[0xc5, 0b1_1111_010, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"); + test_instr(&[0xc5, 0b1_1111_110, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2d, 0b00_001_010], "vcvtsd2si ecx, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2d, 0b00_001_010], "vcvtsd2si ecx, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x2d, 0b00_001_010], "vcvtsd2si ecx, qword [edx]"); + test_instr(&[0xc5, 0b1_1111_011, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"); + test_instr(&[0xc5, 0b1_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2e, 0b00_001_010], "vucomisd xmm1, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2e, 0b00_001_010], "vucomisd xmm1, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2e, 0b11_001_010], "vucomisd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2e, 0b11_001_010], "vucomisd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2f, 0b00_001_010], "vcomisd xmm1, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2f, 0b00_001_010], "vcomisd xmm1, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2f, 0b11_001_010], "vcomisd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2f, 0b11_001_010], "vcomisd xmm1, xmm2"); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b11_001_010]); + + test_instr(&[0xc5, 0b1_1111_000, 0x2e, 0b11_001_010], "vucomiss xmm1, xmm2"); + test_instr(&[0xc5, 0b1_1111_100, 0x2e, 0b00_001_010], "vucomiss xmm1, dword [edx]"); + test_instr(&[0xc5, 0b1_1111_000, 0x2f, 0b11_001_010], "vcomiss xmm1, xmm2"); + test_instr(&[0xc5, 0b1_1111_100, 0x2f, 0b00_001_010], "vcomiss xmm1, dword [edx]"); + test_invalid(&[0xc5, 0b1_1111_111, 0x2f, 0b11_001_010]); + + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b11_001_010], "vmovmskps ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b11_001_010], "vmovmskps ecx, ymm2"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b00_001_010]); + + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x50, 0b11_001_010], "vmovmskpd ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x50, 0b11_001_010], "vmovmskpd ecx, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b11_001_010], "vmovmskpd ecx, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b11_001_010], "vmovmskpd ecx, ymm2"); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x50, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x50, 0b00_001_010]); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x51, 0b00_001_010], "vsqrtpd xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x51, 0b00_001_010], "vsqrtpd ymm1, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_011, 0x51, 0b00_001_010], "vsqrtsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_111, 0x51, 0b00_001_010], "vsqrtsd xmm1, xmm0, qword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x51, 0b00_001_010], "vsqrtps xmm1, xmmword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_000, 0x51, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x51, 0b00_001_010], "vsqrtps ymm1, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x51, 0b00_001_010], "vsqrtss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x51, 0b00_001_010], "vsqrtss xmm1, xmm0, dword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x52, 0b11_001_010], "vrsqrtps xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x52, 0b11_001_010], "vrsqrtps ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x52, 0b11_001_010], "vrsqrtss xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x52, 0b11_001_010], "vrsqrtss xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x53, 0b11_001_010], "vrcpps xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x53, 0b11_001_010], "vrcpps ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x53, 0b11_001_010], "vrcpss xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x53, 0b11_001_010], "vrcpss xmm1, xmm0, xmm2"); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x54, 0b11_001_010], "vandps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x54, 0b11_001_010], "vandps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x55, 0b11_001_010], "vandnps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x55, 0b11_001_010], "vandnps ymm1, ymm0, ymm2"); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x54, 0b00_001_010], "vandpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x54, 0b00_001_010], "vandpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x55, 0b00_001_010], "vandnpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x55, 0b00_001_010], "vandnpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x56, 0b00_001_010], "vorpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x56, 0b00_001_010], "vorpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x56, 0b00_001_010], "vorps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x56, 0b00_001_010], "vorps ymm1, ymm0, ymmword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x57, 0b11_001_010], "vxorps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x57, 0b11_001_010], "vxorps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x57, 0b11_001_010], "vxorpd xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x57, 0b11_001_010], "vxorpd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x58, 0b11_001_010], "vaddps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x58, 0b11_001_010], "vaddps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x58, 0b11_001_010], "vaddss xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x58, 0b11_001_010], "vaddss xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x58, 0b00_001_010], "vaddss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x58, 0b00_001_010], "vaddss xmm1, xmm0, dword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x58, 0b00_001_010], "vaddpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x58, 0b00_001_010], "vaddpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x58, 0b00_001_010], "vaddsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x58, 0b00_001_010], "vaddsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x59, 0b00_001_010], "vmulps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x59, 0b00_001_010], "vmulps ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x59, 0b00_001_010], "vmulpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x59, 0b00_001_010], "vmulpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x59, 0b00_001_010], "vmulss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x59, 0b00_001_010], "vmulss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x59, 0b00_001_010], "vmulsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x59, 0b00_001_010], "vmulsd xmm1, xmm0, qword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5a, 0b11_001_010], "vcvtps2pd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5a, 0b11_001_010], "vcvtps2pd ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5a, 0b00_001_010], "vcvtps2pd xmm1, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5a, 0b00_001_010], "vcvtps2pd ymm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x5a, 0b11_001_010], "vcvtpd2ps xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x5a, 0b11_001_010], "vcvtpd2ps xmm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x5a, 0b11_001_010], "vcvtsd2ss xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x5a, 0b11_001_010], "vcvtsd2ss xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x5a, 0b11_001_010], "vcvtss2sd xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x5a, 0b11_001_010], "vcvtss2sd xmm1, xmm0, xmm2"); + + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x5b, 0b11_001_010], "vcvtps2dq xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x5b, 0b11_001_010], "vcvtps2dq ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x5b, 0b11_001_010], "vcvttps2dq xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x5b, 0b11_001_010], "vcvttps2dq ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5b, 0b11_001_010], "vcvtdq2ps xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5b, 0b00_001_010], "vcvtdq2ps xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5b, 0b11_001_010], "vcvtdq2ps ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5b, 0b00_001_010], "vcvtdq2ps ymm1, ymmword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x5c, 0b00_001_010], "vsubps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_100, 0x5c, 0b00_001_010], "vsubps ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_010, 0x5c, 0b00_001_010], "vsubss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_110, 0x5c, 0b00_001_010], "vsubss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x5c, 0b00_001_010], "vsubpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x5c, 0b00_001_010], "vsubpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_011, 0x5c, 0b00_001_010], "vsubsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_111, 0x5c, 0b00_001_010], "vsubsd xmm1, xmm0, qword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5d, 0b00_001_010], "vminps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x5d, 0b00_001_010], "vminps ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x5d, 0b00_001_010], "vminss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x5d, 0b00_001_010], "vminss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x5d, 0b00_001_010], "vminpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x5d, 0b00_001_010], "vminpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x5d, 0b00_001_010], "vminsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x5d, 0b00_001_010], "vminsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5e, 0b00_001_010], "vdivps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5e, 0b00_001_010], "vdivps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x5e, 0b00_001_010], "vdivpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x5e, 0b00_001_010], "vdivss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x5e, 0b00_001_010], "vdivsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x5e, 0b00_001_010], "vdivps ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x5e, 0b00_001_010], "vdivpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x5e, 0b00_001_010], "vdivss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x5e, 0b00_001_010], "vdivsd xmm1, xmm0, qword [edx]"); + + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5f, 0b00_001_010], "vmaxps xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x5f, 0b00_001_010], "vmaxpd xmm1, xmm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x5f, 0b00_001_010], "vmaxss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x5f, 0b00_001_010], "vmaxsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x5f, 0b00_001_010], "vmaxps ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x5f, 0b00_001_010], "vmaxpd ymm1, ymm0, ymmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x5f, 0b00_001_010], "vmaxss xmm1, xmm0, dword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x5f, 0b00_001_010], "vmaxsd xmm1, xmm0, qword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x60, 0b11_001_010], "vpunpcklbw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x60, 0b11_001_010], "vpunpcklbw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x61, 0b11_001_010], "vpunpcklwd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x61, 0b11_001_010], "vpunpcklwd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x62, 0b11_001_010], "vpunpckldq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x62, 0b11_001_010], "vpunpckldq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x63, 0b11_001_010], "vpacksswb xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0x63, 0b11_001_010], "vpacksswb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x64, 0b11_001_010], "vpcmpgtb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x64, 0b11_001_010], "vpcmpgtb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x65, 0b11_001_010], "vpcmpgtw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x65, 0b11_001_010], "vpcmpgtw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x66, 0b11_001_010], "vpcmpgtd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x66, 0b11_001_010], "vpcmpgtd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x67, 0b11_001_010], "vpackuswb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x67, 0b11_001_010], "vpackuswb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x68, 0b11_001_010], "vpunpckhbw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x68, 0b11_001_010], "vpunpckhbw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x69, 0b11_001_010], "vpunpckhwd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x69, 0b11_001_010], "vpunpckhwd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x6a, 0b11_001_010], "vpunpckhdq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x6a, 0b11_001_010], "vpunpckhdq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x6b, 0b11_001_010], "vpackssdw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x6b, 0b11_001_010], "vpackssdw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6c, 0b11_001_010], "vpunpcklqdq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x6c, 0b11_001_010], "vpunpcklqdq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6d, 0b11_001_010], "vpunpckhqdq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x6d, 0b11_001_010], "vpunpckhqdq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6e, 0b11_001_010], "vmovq xmm1, edx"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6e, 0b00_001_010], "vmovq xmm1, qword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x6e, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x6f, 0b11_001_010], "vmovdqa xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x6f, 0b11_001_010], "vmovdqa ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x6f, 0b11_001_010], "vmovdqu xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x6f, 0b11_001_010], "vmovdqu ymm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x70, 0b11_001_010, 0x77], "vpshufd xmm1, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x70, 0b11_001_010, 0x77], "vpshufd ymm1, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x70, 0b11_001_010, 0x77], "vpshufhw xmm1, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_110, 0x70, 0b11_001_010, 0x77], "vpshufhw ymm1, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x70, 0b11_001_010, 0x77], "vpshuflw xmm1, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_111, 0x70, 0b11_001_010, 0x77], "vpshuflw ymm1, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_010_010, 0x77], "vpsrlw xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x71, 0b11_010_010, 0x77], "vpsrlw xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_010_010, 0x77], "vpsrlw ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_011_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_100_010, 0x77], "vpsraw xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_100_010, 0x77], "vpsraw ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_101_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_110_010, 0x77], "vpsllw xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_110_010, 0x77], "vpsllw ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_000_010, 0x77]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_010_010, 0x77], "vpsrld xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_010_010, 0x77], "vpsrld ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_011_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_100_010, 0x77], "vpsrad xmm0, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_100_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_100_010, 0x77], "vpsrad ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_101_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_110_010, 0x77], "vpslld xmm0, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_110_010, 0x77]); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_110_010, 0x77], "vpslld ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_111_010, 0x77]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_000_010, 0x77]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_010_010, 0x77], "vpsrlq xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_011_010, 0x77], "vpsrldq xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_010_010, 0x77], "vpsrlq ymm0, ymm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_011_010, 0x77], "vpsrldq ymm0, ymm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_100_010, 0x77]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_101_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_110_010, 0x77], "vpsllq xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_111_010, 0x77], "vpslldq xmm0, xmm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_110_010, 0x77], "vpsllq ymm0, ymm2, 0x77"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_111_010, 0x77], "vpslldq ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x74, 0b11_001_010], "vpcmpeqb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0x74, 0b11_001_010], "vpcmpeqb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x75, 0b11_001_010], "vpcmpeqw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0x75, 0b11_001_010], "vpcmpeqw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x76, 0b11_001_010], "vpcmpeqd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0x76, 0b11_001_010], "vpcmpeqd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x7c, 0b11_001_010], "vhaddpd xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x7c, 0b11_001_010], "vhaddpd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x7c, 0b11_001_010], "vhaddps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x7c, 0b11_001_010], "vhaddps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x7d, 0b11_001_010], "vhsubpd xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x7d, 0b11_001_010], "vhsubpd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x7d, 0b11_001_010], "vhsubps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x7d, 0b11_001_010], "vhsubps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x7e, 0b11_001_010], "vmovd edxd, xmm1"); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_101, 0x7e, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x7e, 0b11_001_010], "vmovd edx, xmm1"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x7e, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x7f, 0b11_001_010], "vmovdqa xmm2, xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x7f, 0b11_001_010], "vmovdqa ymm2, ymm1"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x7f, 0b11_001_010], "vmovdqu xmm2, xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x7f, 0b11_001_010], "vmovdqu ymm2, ymm1"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b00_010_001], "vldmxcsr dword [ecx]"); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_010_001]); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_010_001]); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b00_011_001], "vstmxcsr dword [ecx]"); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_011_001]); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_011_001]); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0xc2, 0b11_001_010, 0x77], "vcmpps xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0xc2, 0b11_001_010, 0x77], "vcmpps ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xc2, 0b11_001_010, 0x77], "vcmppd xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0xc2, 0b11_001_010, 0x77], "vcmppd ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0xc2, 0b11_001_010, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0xc2, 0b11_001_010, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xc4, 0b11_001_010, 0x77], "vpinsrw xmm1, xmm0, edxd, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xc4, 0b11_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b00_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b11_001_010, 0x77], "vpextrw ecx, xmm2, 0x77"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xc5, 0b00_001_010, 0x77]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xc5, 0b11_001_010, 0x77]); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xc6, 0b11_001_010, 0x77], "vshufpd xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0xc6, 0b11_001_010, 0x77], "vshufpd ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_000, 0xc6, 0b11_001_010, 0x77], "vshufps xmm1, xmm0, xmm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_100, 0xc6, 0b11_001_010, 0x77], "vshufps ymm1, ymm0, ymm2, 0x77"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd0, 0b11_001_010], "vaddsubpd xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd0, 0b11_001_010], "vaddsubpd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0xd0, 0b11_001_010], "vaddsubps xmm1, xmm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0xd0, 0b11_001_010], "vaddsubps ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd1, 0b11_001_010], "vpsrlw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd1, 0b11_001_010], "vpsrlw ymm1, ymm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd1, 0b00_001_010], "vpsrlw ymm1, ymm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd2, 0b11_001_010], "vpsrld xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd2, 0b11_001_010], "vpsrld ymm1, ymm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd2, 0b00_001_010], "vpsrld ymm1, ymm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd3, 0b11_001_010], "vpsrlq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd3, 0b11_001_010], "vpsrlq ymm1, ymm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd3, 0b00_001_010], "vpsrlq ymm1, ymm0, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd4, 0b11_001_010], "vpaddq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd4, 0b11_001_010], "vpaddq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xd5, 0b11_001_010], "vpmullw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xd5, 0b11_001_010], "vpmullw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b11_001_010], "vpmovmskb ecx, xmm2"); + test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b00_001_010]); + test_avx2(&[0xc4, 0b110_00001, 0b0_1111_101, 0xd7, 0b11_001_010], "vpmovmskb ecx, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd8, 0b11_001_010], "vpsubusb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd8, 0b11_001_010], "vpsubusb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd9, 0b11_001_010], "vpsubusw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd9, 0b11_001_010], "vpsubusw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xda, 0b11_001_010], "vpminsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xda, 0b11_001_010], "vpminsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdb, 0b11_001_010], "vpand xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdb, 0b11_001_010], "vpand ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdc, 0b11_001_010], "vpaddusb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdc, 0b11_001_010], "vpaddusb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdd, 0b11_001_010], "vpaddusw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdd, 0b11_001_010], "vpaddusw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xde, 0b11_001_010], "vpmaxub xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xde, 0b11_001_010], "vpmaxub ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdf, 0b11_001_010], "vpandn xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdf, 0b11_001_010], "vpandn ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe0, 0b11_001_010], "vpavgb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe0, 0b11_001_010], "vpavgb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe1, 0b11_001_010], "vpsraw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe1, 0b11_001_010], "vpsraw ymm1, ymm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe2, 0b11_001_010], "vpsrad xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe2, 0b11_001_010], "vpsrad ymm1, ymm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe3, 0b11_001_010], "vpavgw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe3, 0b11_001_010], "vpavgw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe4, 0b11_001_010], "vpmulhuw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe4, 0b11_001_010], "vpmulhuw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe5, 0b11_001_010], "vpmulhw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe5, 0b11_001_010], "vpmulhw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xe6, 0b11_001_010], "vcvttpd2dq xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0xe6, 0b11_001_010], "vcvttpd2dq xmm1, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0xe6, 0b11_001_010], "vcvtdq2pd xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0xe6, 0b11_001_010], "vcvtdq2pd ymm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0xe6, 0b11_001_010], "vcvtpd2dq xmm1, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0xe6, 0b11_001_010], "vcvtpd2dq xmm1, ymm2"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b00_001_010], "vmovntdq xmmword [edx], xmm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b00_001_010], "vmovntdq ymmword [edx], ymm1"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe8, 0b11_001_010], "vpsubsb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe8, 0b11_001_010], "vpsubsb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe9, 0b11_001_010], "vpsubsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe9, 0b11_001_010], "vpsubsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xea, 0b11_001_010], "vpminsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xea, 0b11_001_010], "vpminsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xeb, 0b11_001_010], "vpor xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xeb, 0b11_001_010], "vpor ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xec, 0b11_001_010], "vpaddsb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xec, 0b11_001_010], "vpaddsb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xed, 0b11_001_010], "vpaddsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xed, 0b11_001_010], "vpaddsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xee, 0b11_001_010], "vpmaxsw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xee, 0b11_001_010], "vpmaxsw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xef, 0b11_001_010], "vpxor xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xef, 0b11_001_010], "vpxor ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b00_001_010], "vlddqu xmm1, xmmword [edx]"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b00_001_010], "vlddqu ymm1, ymmword [edx]"); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0xf0, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0xf0, 0b11_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf1, 0b11_001_010], "vpsllw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf1, 0b11_001_010], "vpsllw ymm1, ymm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf2, 0b11_001_010], "vpslld xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf2, 0b11_001_010], "vpslld ymm1, ymm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf3, 0b11_001_010], "vpsllq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf3, 0b11_001_010], "vpsllq ymm1, ymm0, xmm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf4, 0b11_001_010], "vpmuludq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf4, 0b11_001_010], "vpmuludq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf5, 0b11_001_010], "vpmaddwd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0xf5, 0b11_001_010], "vpmaddwd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf6, 0b11_001_010], "vpsadbw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0xf6, 0b11_001_010], "vpsadbw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b11_001_010], "vmaskmovdqu xmm1, xmm2"); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b00_001_010]); + test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xf7, 0b11_001_010]); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf8, 0b11_001_010], "vpsubb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf8, 0b11_001_010], "vpsubb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf9, 0b11_001_010], "vpsubw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf9, 0b11_001_010], "vpsubw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfa, 0b11_001_010], "vpsubd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfa, 0b11_001_010], "vpsubd ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfb, 0b11_001_010], "vpsubq xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfb, 0b11_001_010], "vpsubq ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfc, 0b11_001_010], "vpaddb xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfc, 0b11_001_010], "vpaddb ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfd, 0b11_001_010], "vpaddw xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfd, 0b11_001_010], "vpaddw ymm1, ymm0, ymm2"); + test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfe, 0b11_001_010], "vpaddd xmm1, xmm0, xmm2"); + test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfe, 0b11_001_010], "vpaddd ymm1, ymm0, ymm2"); + + test_instr(&[0xc5, 0xf8, 0x10, 0x00], "vmovups xmm0, xmmword [eax]"); + test_instr(&[0xc5, 0xf8, 0x10, 0x01], "vmovups xmm0, xmmword [ecx]"); + test_instr(&[0xc5, 0x78, 0x10, 0x0f], "vmovups xmm1, xmmword [edi]"); test_instr(&[0xc5, 0xf8, 0x10, 0xcf], "vmovups xmm1, xmm7"); - test_instr(&[0xc5, 0xf9, 0x10, 0x0f], "vmovupd xmm1, [edi]"); - test_instr(&[0xc5, 0xfa, 0x7e, 0x10], "vmovq xmm2, [eax]"); - test_instr(&[0xc5, 0xfc, 0x10, 0x0f], "vmovups ymm1, [edi]"); - test_instr(&[0xc5, 0xfd, 0x10, 0x0f], "vmovupd ymm1, [edi]"); - test_instr(&[0xc5, 0xfe, 0x10, 0x0f], "vmovss xmm1, [edi]"); - test_instr(&[0xc5, 0xff, 0x10, 0xcf], "vmovsd xmm1, xmm0, xmm7"); - test_instr(&[0xc5, 0xff, 0x10, 0x01], "vmovsd xmm0, [ecx]"); - test_instr(&[0xc5, 0xf9, 0x6e, 0xc6], "vmovd xmm0, esi"); - test_instr(&[0xc5, 0xf9, 0x6e, 0x13], "vmovd xmm2, [ebx]"); - test_instr(&[0xc5, 0xf9, 0x7e, 0xc6], "vmovd esi, xmm0"); - test_instr(&[0xc5, 0xf9, 0x7e, 0x13], "vmovd [ebx], xmm2"); - test_instr_invalid(&[0xf0, 0xc5, 0xf8, 0x10, 0x00]); - test_valid(&[0xc4, 0x02], "les eax, [edx]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x00, 0x0f], "vpshufb xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x00, 0x0f], "vpshufb ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x00, 0xcd], "vpshufb xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x00, 0xcd], "vpshufb ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x01, 0x0f], "vphaddw xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x01, 0x0f], "vphaddw ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x01, 0xcd], "vphaddw xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x01, 0xcd], "vphaddw ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x02, 0x0f], "vphaddd xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x02, 0x0f], "vphaddd ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x02, 0xcd], "vphaddd xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x02, 0xcd], "vphaddd ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x03, 0x0f], "vphaddsw xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x03, 0x0f], "vphaddsw ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x03, 0xcd], "vphaddsw xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x03, 0xcd], "vphaddsw ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x04, 0x0f], "vpmaddubsw xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x04, 0x0f], "vpmaddubsw ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x04, 0xcd], "vpmaddubsw xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x04, 0xcd], "vpmaddubsw ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x05, 0x0f], "vphsubw xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x05, 0x0f], "vphsubw ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x05, 0xcd], "vphsubw xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x05, 0xcd], "vphsubw ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x06, 0x0f], "vphsubd xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x06, 0x0f], "vphsubd ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x06, 0xcd], "vphsubd xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x06, 0xcd], "vphsubd ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x07, 0x0f], "vphsubsw xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x07, 0x0f], "vphsubsw ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x07, 0xcd], "vphsubsw xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x07, 0xcd], "vphsubsw ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x08, 0x0f], "vpsignb xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x08, 0x0f], "vpsignb ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x08, 0xcd], "vpsignb xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x08, 0xcd], "vpsignb ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x09, 0x0f], "vpsignw xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x09, 0x0f], "vpsignw ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x09, 0xcd], "vpsignw xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x09, 0xcd], "vpsignw ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0a, 0x0f], "vpsignd xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0a, 0x0f], "vpsignd ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0a, 0xcd], "vpsignd xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0a, 0xcd], "vpsignd ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0b, 0x0f], "vpmulhrsw xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0b, 0x0f], "vpmulhrsw ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0b, 0xcd], "vpmulhrsw xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0b, 0xcd], "vpmulhrsw ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0c, 0x0f], "vpermilps xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0c, 0x0f], "vpermilps ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0c, 0xcd], "vpermilps xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0c, 0xcd], "vpermilps ymm1, ymm1, ymm5"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0d, 0x0f], "vpermilpd xmm1, xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0d, 0x0f], "vpermilpd ymm1, ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x71, 0x0d, 0xcd], "vpermilpd xmm1, xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x75, 0x0d, 0xcd], "vpermilpd ymm1, ymm1, ymm5"); - test_instr_invalid(&[0xc4, 0xc2, 0x71, 0x0e, 0x00]); - test_instr(&[0xc4, 0xc2, 0x79, 0x0e, 0x0f], "vtestps xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x7d, 0x0e, 0x0f], "vtestps ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x79, 0x0e, 0xcd], "vtestps xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x7d, 0x0e, 0xcd], "vtestps ymm1, ymm5"); - test_instr_invalid(&[0xc4, 0xc2, 0x71, 0x0f, 0x00]); - test_instr(&[0xc4, 0xc2, 0x79, 0x0f, 0x0f], "vtestpd xmm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x7d, 0x0f, 0x0f], "vtestpd ymm1, [edi]"); - test_instr(&[0xc4, 0xc2, 0x79, 0x0f, 0xcd], "vtestpd xmm1, xmm5"); - test_instr(&[0xc4, 0xc2, 0x7d, 0x0f, 0xcd], "vtestpd ymm1, ymm5"); - test_instr(&[0xc4, 0xe2, 0x65, 0x90, 0x04, 0x51], "vpgatherdd ymm0, [ecx + ymm2 * 2], ymm3"); - test_instr(&[0xc4, 0xe2, 0xe5, 0x90, 0x04, 0x51], "vpgatherdq ymm0, [ecx + ymm2 * 2], ymm3"); - test_instr(&[0xc4, 0xe2, 0x65, 0x91, 0x04, 0x51], "vpgatherqd ymm0, [ecx + ymm2 * 2], ymm3"); - test_instr(&[0xc4, 0xe2, 0xe5, 0x91, 0x04, 0x51], "vpgatherqq ymm0, [ecx + ymm2 * 2], ymm3"); - test_instr(&[0xc4, 0xc2, 0x09, 0x9d, 0xcd], "vfnmadd132ss xmm1, xmm6, xmm5"); // note xmm6, not xmm14! - test_instr(&[0xc4, 0xc2, 0x89, 0x9d, 0xcd], "vfnmadd132sd xmm1, xmm6, xmm5"); -// ... - test_instr(&[0xc4, 0xe3, 0x79, 0x14, 0xd0, 0x0a], "vpextrb eax, xmm2, 0xa"); - test_instr(&[0xc4, 0xe3, 0x79, 0x14, 0x10, 0x0a], "vpextrb [eax], xmm2, 0xa"); - test_instr_invalid(&[0xc4, 0xe3, 0xf9, 0x14, 0x00, 0xd0]); - test_instr_invalid(&[0xc4, 0xe3, 0xf9, 0x14, 0x00, 0x0a]); - test_instr(&[0xc5, 0xed, 0x71, 0xd0, 0x04], "vpsrlw ymm2, ymm0, 0x4"); - test_instr(&[0xc5, 0xed, 0x73, 0xd4, 0x20], "vpsrlq ymm2, ymm4, 0x20"); - test_instr(&[0xc4, 0xe3, 0xfd, 0x00, 0xc1, 0xa8], "vpermq ymm0, ymm1, 0xa8"); - test_instr(&[0xc5, 0xfd, 0xea, 0xd1], "vpminsw ymm2, ymm0, ymm1"); - test_instr(&[0xc5, 0xfd, 0xee, 0xd9], "vpmaxsw ymm3, ymm0, ymm1"); - test_instr(&[0xc4, 0xe3, 0x7d, 0x19, 0xd1, 0x01], "vextractf128 xmm1, ymm2, 0x1"); - test_instr(&[0xc4, 0xc3, 0x75, 0x38, 0x7c, 0x12, 0x05, 0x01], "vinserti128 ymm7, ymm1, [edx + edx * 1 + 0x5], 0x1"); - test_instr(&[0xc4, 0xc3, 0x75, 0x42, 0x7c, 0x12, 0x05, 0x61], "vmpsadbw ymm7, ymm1, [edx + edx * 1 + 0x5], 0x61"); - test_instr(&[0xc4, 0xc3, 0x75, 0x46, 0x7c, 0x12, 0x05, 0x61], "vperm2i128 ymm7, ymm1, [edx + edx * 1 + 0x5], 0x61"); - test_instr(&[0xc4, 0xc3, 0x75, 0x4a, 0x7c, 0x12, 0x05, 0x61], "vblendvps ymm7, ymm1, [edx + edx * 1 + 0x5], ymm6"); - test_instr(&[0xc4, 0xc3, 0x71, 0x4a, 0x7c, 0x12, 0x05, 0x61], "vblendvps xmm7, xmm1, [edx + edx * 1 + 0x5], xmm6"); - test_instr(&[0xc4, 0xc3, 0x71, 0x4a, 0xdc, 0x61], "vblendvps xmm3, xmm1, xmm4, xmm6"); - test_instr(&[0xc4, 0xc3, 0x75, 0x4b, 0x7c, 0x12, 0x05, 0x61], "vblendvpd ymm7, ymm1, [edx + edx * 1 + 0x5], ymm6"); - test_instr(&[0xc4, 0xc3, 0x71, 0x4b, 0x7c, 0x12, 0x05, 0x61], "vblendvpd xmm7, xmm1, [edx + edx * 1 + 0x5], xmm6"); - test_instr(&[0xc4, 0xc3, 0x71, 0x4b, 0xdc, 0x61], "vblendvpd xmm3, xmm1, xmm4, xmm6"); - test_instr(&[0xc4, 0xc3, 0x71, 0x4c, 0x7c, 0x12, 0x05, 0x61], "vpblendvb xmm7, xmm1, [edx + edx * 1 + 0x5], xmm6"); - - test_instr(&[0xc5, 0xc9, 0xf1, 0x0f], "vpsllw xmm1, xmm6, [edi]"); - test_instr(&[0xc5, 0xc9, 0xf1, 0xcf], "vpsllw xmm1, xmm6, xmm7"); - test_instr(&[0xc5, 0xcd, 0xf1, 0x0f], "vpsllw ymm1, ymm6, [edi]"); - test_instr(&[0xc5, 0xcd, 0xf1, 0xcf], "vpsllw ymm1, ymm6, xmm7"); - test_instr(&[0xc5, 0xc9, 0xf2, 0x0f], "vpslld xmm1, xmm6, [edi]"); - test_instr(&[0xc5, 0xc9, 0xf2, 0xcf], "vpslld xmm1, xmm6, xmm7"); - test_instr(&[0xc5, 0xcd, 0xf2, 0x0f], "vpslld ymm1, ymm6, [edi]"); - test_instr(&[0xc5, 0xcd, 0xf2, 0xcf], "vpslld ymm1, ymm6, xmm7"); - test_instr(&[0xc5, 0xc9, 0xf3, 0x0f], "vpsllq xmm1, xmm6, [edi]"); - test_instr(&[0xc5, 0xc9, 0xf3, 0xcf], "vpsllq xmm1, xmm6, xmm7"); - test_instr(&[0xc5, 0xcd, 0xf3, 0x0f], "vpsllq ymm1, ymm6, [edi]"); - test_instr(&[0xc5, 0xcd, 0xf3, 0xcf], "vpsllq ymm1, ymm6, xmm7"); - - test_instr(&[0xc5, 0xf1, 0xc4, 0xd8, 0x78], "vpinsrw xmm3, xmm1, eax, 0x78"); - test_instr(&[0xc5, 0xf1, 0xc4, 0x18, 0x78], "vpinsrw xmm3, xmm1, [eax], 0x78"); - - // uh oh, i think these sizes are backwards... - test_instr(&[0xc5, 0xe0, 0x54, 0x03], "vandpd xmm0, xmm3, [ebx]"); - test_instr(&[0xc5, 0xe1, 0x54, 0x03], "vandps xmm0, xmm3, [ebx]"); - test_instr(&[0xc5, 0xe0, 0x55, 0x03], "vandnpd xmm0, xmm3, [ebx]"); - test_instr(&[0xc5, 0xe1, 0x55, 0x03], "vandnps xmm0, xmm3, [ebx]"); - test_instr(&[0xc5, 0xe0, 0x56, 0x03], "vorpd xmm0, xmm3, [ebx]"); - test_instr(&[0xc5, 0xe1, 0x56, 0x03], "vorps xmm0, xmm3, [ebx]"); - test_instr(&[0xc4, 0xe2, 0x15, 0x3e, 0x14, 0xb9], "vpmaxuw ymm2, ymm5, [ecx + edi * 4]"); + test_instr(&[0xc5, 0xf9, 0x10, 0x0f], "vmovupd xmm1, xmmword [edi]"); } #[test] @@ -1466,33 +2221,33 @@ fn prefixed_0f() { test_display(&[0xf2, 0x0f, 0x06], "clts"); test_display(&[0x0f, 0x07], "sysret"); test_display(&[0xf2, 0x0f, 0x07], "sysret"); - test_display(&[0x0f, 0x12, 0x0f], "movlps xmm1, [edi]"); + test_display(&[0x0f, 0x12, 0x0f], "movlps xmm1, qword [edi]"); test_display(&[0x0f, 0x12, 0xcf], "movhlps xmm1, xmm7"); - test_display(&[0x0f, 0x16, 0x0f], "movhps xmm1, [edi]"); + test_display(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [edi]"); test_display(&[0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7"); test_display(&[0x0f, 0x12, 0xc0], "movhlps xmm0, xmm0"); test_invalid(&[0x0f, 0x13, 0xc0]); - test_display(&[0x0f, 0x13, 0x00], "movlps [eax], xmm0"); - test_display(&[0x0f, 0x14, 0x08], "unpcklps xmm1, [eax]"); - test_display(&[0x0f, 0x15, 0x08], "unpckhps xmm1, [eax]"); - test_display(&[0x0f, 0x16, 0x0f], "movhps xmm1, [edi]"); + test_display(&[0x0f, 0x13, 0x00], "movlps qword [eax], xmm0"); + test_display(&[0x0f, 0x14, 0x08], "unpcklps xmm1, xmmword [eax]"); + test_display(&[0x0f, 0x15, 0x08], "unpckhps xmm1, xmmword [eax]"); + test_display(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [edi]"); test_display(&[0x0f, 0x16, 0xc0], "movlhps xmm0, xmm0"); test_invalid(&[0x0f, 0x17, 0xc0]); - test_display(&[0x0f, 0x17, 0x00], "movhps [eax], xmm0"); + test_display(&[0x0f, 0x17, 0x00], "movhps qword [eax], xmm0"); test_display(&[0x0f, 0x18, 0xc0], "nop eax"); // capstone says invalid, xed says nop - test_display(&[0x0f, 0x18, 0x00], "prefetchnta [eax]"); - test_display(&[0x0f, 0x18, 0x08], "prefetch0 [eax]"); - test_display(&[0x0f, 0x18, 0x10], "prefetch1 [eax]"); - test_display(&[0x0f, 0x18, 0x18], "prefetch2 [eax]"); - test_display(&[0x0f, 0x18, 0x20], "nop [eax]"); + test_display(&[0x0f, 0x18, 0x00], "prefetchnta zmmword [eax]"); + test_display(&[0x0f, 0x18, 0x08], "prefetch0 zmmword [eax]"); + test_display(&[0x0f, 0x18, 0x10], "prefetch1 zmmword [eax]"); + test_display(&[0x0f, 0x18, 0x18], "prefetch2 zmmword [eax]"); + test_display(&[0x0f, 0x18, 0x20], "nop zmmword [eax]"); test_display(&[0x0f, 0x18, 0xcc], "nop esp"); - test_display(&[0x0f, 0x19, 0x20], "nop [eax]"); - test_display(&[0x0f, 0x1a, 0x20], "nop [eax]"); - test_display(&[0x0f, 0x1b, 0x20], "nop [eax]"); - test_display(&[0x0f, 0x1c, 0x20], "nop [eax]"); - test_display(&[0x0f, 0x1d, 0x20], "nop [eax]"); - test_display(&[0x0f, 0x1e, 0x20], "nop [eax]"); - test_display(&[0x0f, 0x1f, 0x20], "nop [eax]"); + test_display(&[0x0f, 0x19, 0x20], "nop dword [eax]"); + test_display(&[0x0f, 0x1a, 0x20], "nop dword [eax]"); + test_display(&[0x0f, 0x1b, 0x20], "nop dword [eax]"); + test_display(&[0x0f, 0x1c, 0x20], "nop dword [eax]"); + test_display(&[0x0f, 0x1d, 0x20], "nop dword [eax]"); + test_display(&[0x0f, 0x1e, 0x20], "nop dword [eax]"); + test_display(&[0x0f, 0x1f, 0x20], "nop dword [eax]"); test_display(&[0x0f, 0x20, 0xc0], "mov eax, cr0"); test_invalid(&[0x0f, 0x20, 0xc8]); test_display(&[0x0f, 0x21, 0xc8], "mov eax, dr1"); @@ -1512,38 +2267,38 @@ fn prefixed_0f() { test_invalid(&[0x66, 0x0f, 0x37]); test_invalid(&[0xf2, 0x0f, 0x37]); test_invalid(&[0xf3, 0x0f, 0x37]); - test_display(&[0x0f, 0x60, 0x00], "punpcklbw mm0, [eax]"); + test_display(&[0x0f, 0x60, 0x00], "punpcklbw mm0, dword [eax]"); test_display(&[0x0f, 0x60, 0xc2], "punpcklbw mm0, mm2"); - test_display(&[0x0f, 0x61, 0x00], "punpcklwd mm0, [eax]"); + test_display(&[0x0f, 0x61, 0x00], "punpcklwd mm0, dword [eax]"); test_display(&[0x0f, 0x61, 0xc2], "punpcklwd mm0, mm2"); - test_display(&[0x0f, 0x62, 0x00], "punpckldq mm0, [eax]"); + test_display(&[0x0f, 0x62, 0x00], "punpckldq mm0, dword [eax]"); test_display(&[0x0f, 0x62, 0xc2], "punpckldq mm0, mm2"); - test_display(&[0x0f, 0x63, 0x00], "packsswb mm0, [eax]"); + test_display(&[0x0f, 0x63, 0x00], "packsswb mm0, qword [eax]"); test_display(&[0x0f, 0x63, 0xc2], "packsswb mm0, mm2"); - test_display(&[0x0f, 0x64, 0x00], "pcmpgtb mm0, [eax]"); + test_display(&[0x0f, 0x64, 0x00], "pcmpgtb mm0, qword [eax]"); test_display(&[0x0f, 0x64, 0xc2], "pcmpgtb mm0, mm2"); - test_display(&[0x0f, 0x65, 0x00], "pcmpgtw mm0, [eax]"); + test_display(&[0x0f, 0x65, 0x00], "pcmpgtw mm0, qword [eax]"); test_display(&[0x0f, 0x65, 0xc2], "pcmpgtw mm0, mm2"); - test_display(&[0x0f, 0x66, 0x00], "pcmpgtd mm0, [eax]"); + test_display(&[0x0f, 0x66, 0x00], "pcmpgtd mm0, qword [eax]"); test_display(&[0x0f, 0x66, 0xc2], "pcmpgtd mm0, mm2"); - test_display(&[0x0f, 0x67, 0x00], "packuswb mm0, [eax]"); + test_display(&[0x0f, 0x67, 0x00], "packuswb mm0, qword [eax]"); test_display(&[0x0f, 0x67, 0xc2], "packuswb mm0, mm2"); - test_display(&[0x0f, 0x68, 0x00], "punpckhbw mm0, [eax]"); + test_display(&[0x0f, 0x68, 0x00], "punpckhbw mm0, qword [eax]"); test_display(&[0x0f, 0x68, 0xc2], "punpckhbw mm0, mm2"); - test_display(&[0x0f, 0x69, 0x00], "punpckhwd mm0, [eax]"); + test_display(&[0x0f, 0x69, 0x00], "punpckhwd mm0, qword [eax]"); test_display(&[0x0f, 0x69, 0xc2], "punpckhwd mm0, mm2"); - test_display(&[0x0f, 0x6a, 0x00], "punpckhdq mm0, [eax]"); + test_display(&[0x0f, 0x6a, 0x00], "punpckhdq mm0, qword [eax]"); test_display(&[0x0f, 0x6a, 0xc2], "punpckhdq mm0, mm2"); - test_display(&[0x0f, 0x6b, 0x00], "packssdw mm0, [eax]"); + test_display(&[0x0f, 0x6b, 0x00], "packssdw mm0, qword [eax]"); test_display(&[0x0f, 0x6b, 0xc2], "packssdw mm0, mm2"); test_invalid(&[0x0f, 0x6c]); test_invalid(&[0x0f, 0x6d]); - test_display(&[0x0f, 0x6e, 0x00], "movd mm0, [eax]"); + test_display(&[0x0f, 0x6e, 0x00], "movd mm0, dword [eax]"); test_display(&[0x0f, 0x6e, 0xc2], "movd mm0, edx"); - test_display(&[0x0f, 0x6f, 0x00], "movq mm0, [eax]"); + test_display(&[0x0f, 0x6f, 0x00], "movq mm0, qword [eax]"); test_display(&[0x0f, 0x6f, 0xc2], "movq mm0, mm2"); test_display(&[0x0f, 0x6f, 0xfb], "movq mm7, mm3"); - test_display(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, [eax], 0x7f"); + test_display(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [eax], 0x7f"); test_invalid(&[0x0f, 0x71, 0x00, 0x7f]); test_invalid(&[0x0f, 0x71, 0xc0, 0x7f]); test_display(&[0x0f, 0x71, 0xd0, 0x7f], "psrlw mm0, 0x7f"); @@ -1596,10 +2351,10 @@ fn only_32bit() { test_display(&[0x48], "dec eax"); test_display(&[0x4f], "dec edi"); - test_display(&[0xa0, 0xc0, 0xb0, 0xa0, 0x90], "mov al, [0x90a0b0c0]"); - test_display(&[0x67, 0xa0, 0xc0, 0xb0], "mov al, [0xb0c0]"); - test_display(&[0x67, 0xa1, 0xc0, 0xb0], "mov eax, [0xb0c0]"); - test_display(&[0x66, 0x67, 0xa1, 0xc0, 0xb0], "mov ax, [0xb0c0]"); + test_display(&[0xa0, 0xc0, 0xb0, 0xa0, 0x90], "mov al, byte [0x90a0b0c0]"); + test_display(&[0x67, 0xa0, 0xc0, 0xb0], "mov al, byte [0xb0c0]"); + test_display(&[0x67, 0xa1, 0xc0, 0xb0], "mov eax, dword [0xb0c0]"); + test_display(&[0x66, 0x67, 0xa1, 0xc0, 0xb0], "mov ax, word [0xb0c0]"); test_display(&[0x60], "pusha"); test_display(&[0x61], "popa"); @@ -1624,14 +2379,14 @@ fn only_32bit() { #[test] fn test_adx() { test_display(&[0x66, 0x0f, 0x38, 0xf6, 0xc1], "adcx eax, ecx"); - test_display(&[0x66, 0x0f, 0x38, 0xf6, 0x01], "adcx eax, [ecx]"); + test_display(&[0x66, 0x0f, 0x38, 0xf6, 0x01], "adcx eax, dword [ecx]"); test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0xc1], "adox eax, ecx"); - test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0x01], "adox eax, [ecx]"); + test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0x01], "adox eax, dword [ecx]"); } #[test] fn test_prefetchw() { - test_display(&[0x0f, 0x0d, 0x08], "prefetchw [eax]"); + test_display(&[0x0f, 0x0d, 0x08], "prefetchw zmmword [eax]"); } #[test] @@ -1652,18 +2407,18 @@ fn test_svm() { test_display(&[0x0f, 0x01, 0xd8], "vmrun eax"); test_display(&[0x0f, 0x78, 0xc4], "vmread esp, eax"); test_display(&[0x0f, 0x79, 0xc5], "vmwrite eax, ebp"); - test_display(&[0x0f, 0x78, 0x0b], "vmread [ebx], ecx"); + test_display(&[0x0f, 0x78, 0x0b], "vmread qword [ebx], ecx"); test_invalid(&[0x66, 0x0f, 0x78, 0x03]); - test_display(&[0x0f, 0x79, 0x0b], "vmwrite ecx, [ebx]"); + test_display(&[0x0f, 0x79, 0x0b], "vmwrite ecx, qword [ebx]"); test_invalid(&[0x66, 0x0f, 0x79, 0x03]); } #[test] fn test_movbe() { - test_display(&[0x0f, 0x38, 0xf0, 0x06], "movbe eax, [esi]"); + test_display(&[0x0f, 0x38, 0xf0, 0x06], "movbe eax, dword [esi]"); test_invalid(&[0x0f, 0x38, 0xf0, 0xc6]); - test_display(&[0x0f, 0x38, 0xf1, 0x06], "movbe [esi], eax"); - test_display(&[0x66, 0x0f, 0x38, 0xf1, 0x06], "movbe [esi], ax"); + test_display(&[0x0f, 0x38, 0xf1, 0x06], "movbe dword [esi], eax"); + test_display(&[0x66, 0x0f, 0x38, 0xf1, 0x06], "movbe word [esi], ax"); test_invalid(&[0x66, 0x0f, 0x38, 0xf1, 0xc6]); } @@ -1686,28 +2441,28 @@ fn test_rand() { #[test] fn test_sha() { - test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, [edx], 0x40"); - test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0xff], "sha1rnds4 xmm2, [edx], 0xff"); - test_display(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, [edx]"); - test_display(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, [edx]"); - test_display(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, [edx]"); - test_display(&[0x0f, 0x38, 0xcb, 0x12], "sha256rnds2 xmm2, [edx]"); - test_display(&[0x0f, 0x38, 0xcc, 0x12], "sha256msg1 xmm2, [edx]"); - test_display(&[0x0f, 0x38, 0xcd, 0x12], "sha256msg2 xmm2, [edx]"); + test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, xmmword [edx], 0x40"); + test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0xff], "sha1rnds4 xmm2, xmmword [edx], 0xff"); + test_display(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, xmmword [edx]"); + test_display(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, xmmword [edx]"); + test_display(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, xmmword [edx]"); + test_display(&[0x0f, 0x38, 0xcb, 0x12], "sha256rnds2 xmm2, xmmword [edx]"); + test_display(&[0x0f, 0x38, 0xcc, 0x12], "sha256msg1 xmm2, xmmword [edx]"); + test_display(&[0x0f, 0x38, 0xcd, 0x12], "sha256msg2 xmm2, xmmword [edx]"); } #[test] fn test_vmx() { - test_display(&[0x0f, 0xc7, 0x3f], "vmptrst [edi]"); - test_display(&[0x0f, 0xc7, 0x37], "vmptrld [edi]"); - test_display(&[0xf3, 0x0f, 0xc7, 0x37], "vmxon [edi]"); + test_display(&[0x0f, 0xc7, 0x3f], "vmptrst qword [edi]"); + test_display(&[0x0f, 0xc7, 0x37], "vmptrld qword [edi]"); + test_display(&[0xf3, 0x0f, 0xc7, 0x37], "vmxon qword [edi]"); test_display(&[0x66, 0x0f, 0xc7, 0xf7], "rdrand di"); - test_display(&[0x66, 0x0f, 0xc7, 0x37], "vmclear [edi]"); + test_display(&[0x66, 0x0f, 0xc7, 0x37], "vmclear qword [edi]"); // this is actually vmx // test_invalid(&[0x66, 0x0f, 0xc7, 0x03]); - test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear [ebx]"); - test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon [ebx]"); + test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [ebx]"); + test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [ebx]"); } #[test] @@ -1717,30 +2472,30 @@ fn test_rdpid() { #[test] fn test_cmpxchg8b() { - test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]"); - test_display(&[0xf2, 0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]"); - test_display(&[0xf3, 0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]"); - test_display(&[0x66, 0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]"); + test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"); + test_display(&[0xf2, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"); + test_display(&[0xf3, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"); + test_display(&[0x66, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"); } #[test] fn test_x87() { // test_display(&[0xd8, 0x03], "fadd st, dword ptr [ebx]"); - test_display(&[0xd8, 0x03], "fadd st(0), [ebx]"); + test_display(&[0xd8, 0x03], "fadd st(0), dword [ebx]"); // test_display(&[0xd8, 0x0b], "fmul st, dword ptr [ebx]"); - test_display(&[0xd8, 0x0b], "fmul st(0), [ebx]"); + test_display(&[0xd8, 0x0b], "fmul st(0), dword [ebx]"); // test_display(&[0xd8, 0x13], "fcom st, dword ptr [ebx]"); - test_display(&[0xd8, 0x13], "fcom st(0), [ebx]"); + test_display(&[0xd8, 0x13], "fcom st(0), dword [ebx]"); // test_display(&[0xd8, 0x1b], "fcomp st, dword ptr [ebx]"); - test_display(&[0xd8, 0x1b], "fcomp st(0), [ebx]"); + test_display(&[0xd8, 0x1b], "fcomp st(0), dword [ebx]"); // test_display(&[0xd8, 0x23], "fsub st, dword ptr [ebx]"); - test_display(&[0xd8, 0x23], "fsub st(0), [ebx]"); + test_display(&[0xd8, 0x23], "fsub st(0), dword [ebx]"); // test_display(&[0xd8, 0x2b], "fsubr st, dword ptr [ebx]"); - test_display(&[0xd8, 0x2b], "fsubr st(0), [ebx]"); + test_display(&[0xd8, 0x2b], "fsubr st(0), dword [ebx]"); // test_display(&[0xd8, 0x33], "fdiv st, dword ptr [ebx]"); - test_display(&[0xd8, 0x33], "fdiv st(0), [ebx]"); + test_display(&[0xd8, 0x33], "fdiv st(0), dword [ebx]"); // test_display(&[0xd8, 0x3b], "fdivr st, dword ptr [ebx]"); - test_display(&[0xd8, 0x3b], "fdivr st(0), [ebx]"); + test_display(&[0xd8, 0x3b], "fdivr st(0), dword [ebx]"); // test_display(&[0xd8, 0xc3], "fadd st, st(3)"); test_display(&[0xd8, 0xc3], "fadd st(0), st(3)"); // test_display(&[0xd8, 0xcb], "fmul st, st(3)"); @@ -1758,7 +2513,7 @@ fn test_x87() { // test_display(&[0xd8, 0xfb], "fdivr st, st(3)"); test_display(&[0xd8, 0xfb], "fdivr st(0), st(3)"); // test_display(&[0xd9, 0x03], "fld st, dword ptr [ebx]"); - test_display(&[0xd9, 0x03], "fld st(0), [ebx]"); + test_display(&[0xd9, 0x03], "fld st(0), dword [ebx]"); test_invalid(&[0xd9, 0x08]); test_invalid(&[0xd9, 0x09]); test_invalid(&[0xd9, 0x0a]); @@ -1768,17 +2523,17 @@ fn test_x87() { test_invalid(&[0xd9, 0x0e]); test_invalid(&[0xd9, 0x0f]); // test_display(&[0xd9, 0x13], "fst dword ptr [ebx], st"); - test_display(&[0xd9, 0x13], "fst [ebx], st(0)"); + test_display(&[0xd9, 0x13], "fst dword [ebx], st(0)"); // test_display(&[0xd9, 0x1b], "fstp dword ptr [ebx], st"); - test_display(&[0xd9, 0x1b], "fstp [ebx], st(0)"); + test_display(&[0xd9, 0x1b], "fstp dword [ebx], st(0)"); // test_display(&[0xd9, 0x23], "fldenv ptr [ebx]"); - test_display(&[0xd9, 0x23], "fldenv [ebx]"); + test_display(&[0xd9, 0x23], "fldenv ptr [ebx]"); // test_display(&[0xd9, 0x2b], "fldcw word ptr [ebx]"); - test_display(&[0xd9, 0x2b], "fldcw [ebx]"); + test_display(&[0xd9, 0x2b], "fldcw word [ebx]"); // test_display(&[0xd9, 0x33], "fnstenv ptr [ebx]"); - test_display(&[0xd9, 0x33], "fnstenv [ebx]"); + test_display(&[0xd9, 0x33], "fnstenv ptr [ebx]"); // test_display(&[0xd9, 0x3b], "fnstcw word ptr [ebx]"); - test_display(&[0xd9, 0x3b], "fnstcw [ebx]"); + test_display(&[0xd9, 0x3b], "fnstcw word [ebx]"); // test_display(&[0xd9, 0xc3], "fld st, st(3)"); test_display(&[0xd9, 0xc3], "fld st(0), st(3)"); // test_display(&[0xd9, 0xcb], "fxch st, st(3)"); @@ -1827,21 +2582,21 @@ fn test_x87() { test_display(&[0xd9, 0xfe], "fsin"); test_display(&[0xd9, 0xff], "fcos"); // test_display(&[0xda, 0x03], "fiadd st, dword ptr [ebx]"); - test_display(&[0xda, 0x03], "fiadd st(0), [ebx]"); + test_display(&[0xda, 0x03], "fiadd st(0), dword [ebx]"); // test_display(&[0xda, 0x0b], "fimul st, dword ptr [ebx]"); - test_display(&[0xda, 0x0b], "fimul st(0), [ebx]"); + test_display(&[0xda, 0x0b], "fimul st(0), dword [ebx]"); // test_display(&[0xda, 0x13], "ficom st, dword ptr [ebx]"); - test_display(&[0xda, 0x13], "ficom st(0), [ebx]"); + test_display(&[0xda, 0x13], "ficom st(0), dword [ebx]"); // test_display(&[0xda, 0x1b], "ficomp st, dword ptr [ebx]"); - test_display(&[0xda, 0x1b], "ficomp st(0), [ebx]"); + test_display(&[0xda, 0x1b], "ficomp st(0), dword [ebx]"); // test_display(&[0xda, 0x23], "fisub st, dword ptr [ebx]"); - test_display(&[0xda, 0x23], "fisub st(0), [ebx]"); + test_display(&[0xda, 0x23], "fisub st(0), dword [ebx]"); // test_display(&[0xda, 0x2b], "fisubr st, dword ptr [ebx]"); - test_display(&[0xda, 0x2b], "fisubr st(0), [ebx]"); + test_display(&[0xda, 0x2b], "fisubr st(0), dword [ebx]"); // test_display(&[0xda, 0x33], "fidiv st, dword ptr [ebx]"); - test_display(&[0xda, 0x33], "fidiv st(0), [ebx]"); + test_display(&[0xda, 0x33], "fidiv st(0), dword [ebx]"); // test_display(&[0xda, 0x3b], "fidivr st, dword ptr [ebx]"); - test_display(&[0xda, 0x3b], "fidivr st(0), [ebx]"); + test_display(&[0xda, 0x3b], "fidivr st(0), dword [ebx]"); // test_display(&[0xda, 0xc3], "fcmovb st, st(3)"); test_display(&[0xda, 0xc3], "fcmovb st(0), st(3)"); // test_display(&[0xda, 0xcb], "fcmove st, st(3)"); @@ -1883,13 +2638,13 @@ fn test_x87() { test_invalid(&[0xda, 0xfe]); test_invalid(&[0xda, 0xff]); // test_display(&[0xdb, 0x03], "fild st, dword ptr [ebx]"); - test_display(&[0xdb, 0x03], "fild st(0), [ebx]"); + test_display(&[0xdb, 0x03], "fild st(0), dword [ebx]"); // test_display(&[0xdb, 0x0b], "fisttp dword ptr [ebx], st"); - test_display(&[0xdb, 0x0b], "fisttp [ebx], st(0)"); + test_display(&[0xdb, 0x0b], "fisttp dword [ebx], st(0)"); // test_display(&[0xdb, 0x13], "fist dword ptr [ebx], st"); - test_display(&[0xdb, 0x13], "fist [ebx], st(0)"); + test_display(&[0xdb, 0x13], "fist dword [ebx], st(0)"); // test_display(&[0xdb, 0x1b], "fistp dword ptr [ebx], st"); - test_display(&[0xdb, 0x1b], "fistp [ebx], st(0)"); + test_display(&[0xdb, 0x1b], "fistp dword [ebx], st(0)"); test_invalid(&[0xdb, 0x20]); test_invalid(&[0xdb, 0x21]); test_invalid(&[0xdb, 0x22]); @@ -1899,7 +2654,7 @@ fn test_x87() { test_invalid(&[0xdb, 0x26]); test_invalid(&[0xdb, 0x27]); // test_display(&[0xdb, 0x2b], "fld st, ptr [ebx]"); - test_display(&[0xdb, 0x2b], "fld st(0), [ebx]"); + test_display(&[0xdb, 0x2b], "fld st(0), mword [ebx]"); test_invalid(&[0xdb, 0x30]); test_invalid(&[0xdb, 0x31]); test_invalid(&[0xdb, 0x32]); @@ -1909,7 +2664,7 @@ fn test_x87() { test_invalid(&[0xdb, 0x36]); test_invalid(&[0xdb, 0x37]); // test_display(&[0xdb, 0x3b], "fstp ptr [ebx], st"); - test_display(&[0xdb, 0x3b], "fstp [ebx], st(0)"); + test_display(&[0xdb, 0x3b], "fstp mword [ebx], st(0)"); // test_display(&[0xdb, 0xc3], "fcmovnb st, st(3)"); test_display(&[0xdb, 0xc3], "fcmovnb st(0), st(3)"); // test_display(&[0xdb, 0xcb], "fcmovne st, st(3)"); @@ -1939,21 +2694,21 @@ fn test_x87() { test_invalid(&[0xdb, 0xfe]); test_invalid(&[0xdb, 0xff]); // test_display(&[0xdc, 0x03], "fadd st, qword ptr [ebx]"); - test_display(&[0xdc, 0x03], "fadd st(0), [ebx]"); + test_display(&[0xdc, 0x03], "fadd st(0), qword [ebx]"); // test_display(&[0xdc, 0x0b], "fmul st, qword ptr [ebx]"); - test_display(&[0xdc, 0x0b], "fmul st(0), [ebx]"); + test_display(&[0xdc, 0x0b], "fmul st(0), qword [ebx]"); // test_display(&[0xdc, 0x13], "fcom st, qword ptr [ebx]"); - test_display(&[0xdc, 0x13], "fcom st(0), [ebx]"); + test_display(&[0xdc, 0x13], "fcom st(0), qword [ebx]"); // test_display(&[0xdc, 0x1b], "fcomp st, qword ptr [ebx]"); - test_display(&[0xdc, 0x1b], "fcomp st(0), [ebx]"); + test_display(&[0xdc, 0x1b], "fcomp st(0), qword [ebx]"); // test_display(&[0xdc, 0x23], "fsub st, qword ptr [ebx]"); - test_display(&[0xdc, 0x23], "fsub st(0), [ebx]"); + test_display(&[0xdc, 0x23], "fsub st(0), qword [ebx]"); // test_display(&[0xdc, 0x2b], "fsubr st, qword ptr [ebx]"); - test_display(&[0xdc, 0x2b], "fsubr st(0), [ebx]"); + test_display(&[0xdc, 0x2b], "fsubr st(0), qword [ebx]"); // test_display(&[0xdc, 0x33], "fdiv st, qword ptr [ebx]"); - test_display(&[0xdc, 0x33], "fdiv st(0), [ebx]"); + test_display(&[0xdc, 0x33], "fdiv st(0), qword [ebx]"); // test_display(&[0xdc, 0x3b], "fdivr st, qword ptr [ebx]"); - test_display(&[0xdc, 0x3b], "fdivr st(0), [ebx]"); + test_display(&[0xdc, 0x3b], "fdivr st(0), qword [ebx]"); // test_display(&[0xdc, 0xc3], "fadd st(3), st"); test_display(&[0xdc, 0xc3], "fadd st(3), st(0)"); // test_display(&[0xdc, 0xcb], "fmul st(3), st"); @@ -1971,15 +2726,15 @@ fn test_x87() { // test_display(&[0xdc, 0xfb], "fdiv st(3), st"); test_display(&[0xdc, 0xfb], "fdiv st(3), st(0)"); // test_display(&[0xdd, 0x03], "fld st, qword ptr [ebx]"); - test_display(&[0xdd, 0x03], "fld st(0), [ebx]"); + test_display(&[0xdd, 0x03], "fld st(0), qword [ebx]"); // test_display(&[0xdd, 0x0b], "fisttp qword ptr [ebx], st"); - test_display(&[0xdd, 0x0b], "fisttp [ebx], st(0)"); + test_display(&[0xdd, 0x0b], "fisttp qword [ebx], st(0)"); // test_display(&[0xdd, 0x13], "fst qword ptr [ebx], st"); - test_display(&[0xdd, 0x13], "fst [ebx], st(0)"); + test_display(&[0xdd, 0x13], "fst qword [ebx], st(0)"); // test_display(&[0xdd, 0x1b], "fstp qword ptr [ebx], st"); - test_display(&[0xdd, 0x1b], "fstp [ebx], st(0)"); + test_display(&[0xdd, 0x1b], "fstp qword [ebx], st(0)"); // test_display(&[0xdd, 0x23], "frstor ptr [ebx]"); - test_display(&[0xdd, 0x23], "frstor [ebx]"); + test_display(&[0xdd, 0x23], "frstor ptr [ebx]"); test_invalid(&[0xdd, 0x28]); test_invalid(&[0xdd, 0x29]); test_invalid(&[0xdd, 0x2a]); @@ -1989,9 +2744,9 @@ fn test_x87() { test_invalid(&[0xdd, 0x2e]); test_invalid(&[0xdd, 0x2f]); // test_display(&[0xdd, 0x33], "fnsave ptr [ebx]"); - test_display(&[0xdd, 0x33], "fnsave [ebx]"); + test_display(&[0xdd, 0x33], "fnsave ptr [ebx]"); // test_display(&[0xdd, 0x3b], "fnstsw word ptr [ebx]"); - test_display(&[0xdd, 0x3b], "fnstsw [ebx]"); + test_display(&[0xdd, 0x3b], "fnstsw word [ebx]"); test_display(&[0xdd, 0xc3], "ffree st(3)"); // test_display(&[0xdd, 0xcb], "fxch st, st(3)"); test_display(&[0xdd, 0xcb], "fxch st(0), st(3)"); @@ -2020,21 +2775,21 @@ fn test_x87() { test_invalid(&[0xdd, 0xfe]); test_invalid(&[0xdd, 0xff]); // test_display(&[0xde, 0x03], "fiadd st, word ptr [ebx]"); - test_display(&[0xde, 0x03], "fiadd st(0), [ebx]"); + test_display(&[0xde, 0x03], "fiadd st(0), word [ebx]"); // test_display(&[0xde, 0x0b], "fimul st, word ptr [ebx]"); - test_display(&[0xde, 0x0b], "fimul st(0), [ebx]"); + test_display(&[0xde, 0x0b], "fimul st(0), word [ebx]"); // test_display(&[0xde, 0x13], "ficom st, word ptr [ebx]"); - test_display(&[0xde, 0x13], "ficom st(0), [ebx]"); + test_display(&[0xde, 0x13], "ficom st(0), word [ebx]"); // test_display(&[0xde, 0x1b], "ficomp st, word ptr [ebx]"); - test_display(&[0xde, 0x1b], "ficomp st(0), [ebx]"); + test_display(&[0xde, 0x1b], "ficomp st(0), word [ebx]"); // test_display(&[0xde, 0x23], "fisub st, word ptr [ebx]"); - test_display(&[0xde, 0x23], "fisub st(0), [ebx]"); + test_display(&[0xde, 0x23], "fisub st(0), word [ebx]"); // test_display(&[0xde, 0x2b], "fisubr st, word ptr [ebx]"); - test_display(&[0xde, 0x2b], "fisubr st(0), [ebx]"); + test_display(&[0xde, 0x2b], "fisubr st(0), word [ebx]"); // test_display(&[0xde, 0x33], "fidiv st, word ptr [ebx]"); - test_display(&[0xde, 0x33], "fidiv st(0), [ebx]"); + test_display(&[0xde, 0x33], "fidiv st(0), word [ebx]"); // test_display(&[0xde, 0x3b], "fidivr st, word ptr [ebx]"); - test_display(&[0xde, 0x3b], "fidivr st(0), [ebx]"); + test_display(&[0xde, 0x3b], "fidivr st(0), word [ebx]"); // test_display(&[0xde, 0xc3], "faddp st(3), st"); test_display(&[0xde, 0xc3], "faddp st(3), st(0)"); // test_display(&[0xde, 0xcb], "fmulp st(3), st"); @@ -2058,21 +2813,21 @@ fn test_x87() { // test_display(&[0xde, 0xfb], "fdivp st(3), st"); test_display(&[0xde, 0xfb], "fdivp st(3), st(0)"); // test_display(&[0xdf, 0x03], "fild st, word ptr [ebx]"); - test_display(&[0xdf, 0x03], "fild st(0), [ebx]"); + test_display(&[0xdf, 0x03], "fild st(0), word [ebx]"); // test_display(&[0xdf, 0x0b], "fisttp word ptr [ebx], st"); - test_display(&[0xdf, 0x0b], "fisttp [ebx], st(0)"); + test_display(&[0xdf, 0x0b], "fisttp word [ebx], st(0)"); // test_display(&[0xdf, 0x13], "fist word ptr [ebx], st"); - test_display(&[0xdf, 0x13], "fist [ebx], st(0)"); + test_display(&[0xdf, 0x13], "fist word [ebx], st(0)"); // test_display(&[0xdf, 0x1b], "fistp word ptr [ebx], st"); - test_display(&[0xdf, 0x1b], "fistp [ebx], st(0)"); + test_display(&[0xdf, 0x1b], "fistp word [ebx], st(0)"); // test_display(&[0xdf, 0x23], "fbld st, ptr [ebx]"); - test_display(&[0xdf, 0x23], "fbld st(0), [ebx]"); + test_display(&[0xdf, 0x23], "fbld st(0), mword [ebx]"); // test_display(&[0xdf, 0x2b], "fild st, qword ptr [ebx]"); - test_display(&[0xdf, 0x2b], "fild st(0), [ebx]"); + test_display(&[0xdf, 0x2b], "fild st(0), qword [ebx]"); // test_display(&[0xdf, 0x33], "fbstp ptr [ebx], st"); - test_display(&[0xdf, 0x33], "fbstp [ebx], st(0)"); + test_display(&[0xdf, 0x33], "fbstp mword [ebx], st(0)"); // test_display(&[0xdf, 0x3b], "fistp qword ptr [ebx], st"); - test_display(&[0xdf, 0x3b], "fistp [ebx], st(0)"); + test_display(&[0xdf, 0x3b], "fistp qword [ebx], st(0)"); // test_display(&[0xdf, 0xc3], "ffreep st(3)"); test_display(&[0xdf, 0xc3], "ffreep st(3)"); // test_display(&[0xdf, 0xcb], "fxch st, st(3)"); @@ -2107,7 +2862,7 @@ fn test_x87() { fn test_mishegos_finds() { test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms"); test_display(&[0x26, 0x66, 0x67, 0x0f, 0x38, 0xdf, 0xe4], "aesdeclast xmm4, xmm4"); - test_display(&[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, fs:[edi]"); + test_display(&[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword fs:[edi]"); test_invalid(&[0xf3, 0xf2, 0x0f, 0xae, 0x8f, 0x54, 0x3c, 0x58, 0xb7]); /* test_display(&[652e662e0f3814ff], "blendvps"); @@ -2118,28 +2873,28 @@ fn test_mishegos_finds() { // impossible instruction if operands could be read: lock is illegal here. // test_display(&[f06565f2640f16], "???"); // test_display(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd"); - test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, ss:[eax - 0x5]"); - test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]"); - test_display(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b], "movntdqa xmm5, cs:[ebx]"); - test_display(&[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c], "blendpd xmm7, cs:[bx + si + 0x2ff0], 0x7c"); - test_display(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d], "pmovsxwd xmm3, [ebp + 0x2da80f69]"); - test_display(&[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1], "insertps xmm1, fs:[ebx], -0x4f"); - test_display(&[0x66, 0x26, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a], "mpsadbw xmm2, es:[esi - 0x669d68c], 0x6a"); - test_display(&[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03], "pmaxud xmm3, gs:[di + 0x3cc]"); - test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri cs:[ebp + 0x3e], edx"); + test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[eax - 0x5]"); + test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"); + test_display(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b], "movntdqa xmm5, xmmword cs:[ebx]"); + test_display(&[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c], "blendpd xmm7, xmmword cs:[bx + si + 0x2ff0], 0x7c"); + test_display(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d], "pmovsxwd xmm3, qword [ebp + 0x2da80f69]"); + test_display(&[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1], "insertps xmm1, dword fs:[ebx], -0x4f"); + test_display(&[0x66, 0x26, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a], "mpsadbw xmm2, xmmword es:[esi - 0x669d68c], 0x6a"); + test_display(&[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03], "pmaxud xmm3, xmmword gs:[di + 0x3cc]"); + test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri dword cs:[ebp + 0x3e], edx"); test_invalid(&[0x66, 0x2e, 0x64, 0x66, 0x0f, 0x38, 0xf8, 0xe2]); test_display(&[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1], "punpckhqdq xmm2, xmm1"); - test_display(&[0x2e, 0x66, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, cs:[eax + 0x2d], 0x57"); - test_display(&[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f], "lddqu xmm4, es:[bx + si + 0x5f1b]"); - test_display(&[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, [eax], 0x48"); + test_display(&[0x2e, 0x66, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, xmmword cs:[eax + 0x2d], 0x57"); + test_display(&[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f], "lddqu xmm4, xmmword es:[bx + si + 0x5f1b]"); + test_display(&[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, xmmword [eax], 0x48"); test_display(&[0x2e, 0x36, 0x0f, 0x18, 0xe7], "nop edi"); - test_display(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg gs:[edi], ecx"); - test_display(&[0x66, 0x0f, 0x3a, 0x44, 0x88, 0xb3, 0xad, 0x26, 0x35, 0x75], "pclmulqdq xmm1, [eax + 0x3526adb3], 0x75"); - test_display(&[0x0f, 0xff, 0x6b, 0xac], "ud0 ebp, [ebx - 0x54]"); + test_display(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg dword gs:[edi], ecx"); + test_display(&[0x66, 0x0f, 0x3a, 0x44, 0x88, 0xb3, 0xad, 0x26, 0x35, 0x75], "pclmulqdq xmm1, xmmword [eax + 0x3526adb3], 0x75"); + test_display(&[0x0f, 0xff, 0x6b, 0xac], "ud0 ebp, dword [ebx - 0x54]"); - test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, ss:[ebx + 0x3f9d1c09]"); - test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, fs:[edx + 0x54]"); + test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, zmmword ss:[ebx + 0x3f9d1c09]"); + test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, zmmword fs:[edx + 0x54]"); test_invalid(&[0xf3, 0x0f, 0x38, 0xf8, 0xf3]); test_display(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0"); @@ -2164,8 +2919,8 @@ fn test_cet() { // endbr64 f3 0f ae fa // endbr32 f3 0f ae fb test_display(&[0xf3, 0x0f, 0xae, 0xe9], "incssp ecx"); - test_display(&[0x3e, 0x0f, 0x38, 0xf6, 0x23], "wrss [ebx], esp"); - test_display(&[0x66, 0x0f, 0x38, 0xf5, 0x47, 0xe9], "wruss [edi - 0x17], eax"); + test_display(&[0x3e, 0x0f, 0x38, 0xf6, 0x23], "wrss dword [ebx], esp"); + test_display(&[0x66, 0x0f, 0x38, 0xf5, 0x47, 0xe9], "wruss dword [edi - 0x17], eax"); test_invalid(&[0x0f, 0x38, 0xf5, 0x47, 0xe9]); test_invalid(&[0x66, 0x3e, 0x65, 0x3e, 0x0f, 0x38, 0xf5, 0xf0]); test_display(&[0xf3, 0x0f, 0x01, 0xe8], "setssbsy"); @@ -2174,9 +2929,9 @@ fn test_cet() { test_display(&[0x66, 0xf3, 0x0f, 0x01, 0xea], "saveprevssp"); test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xe8], "setssbsy"); test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xea], "saveprevssp"); - test_display(&[0xf3, 0x0f, 0x01, 0x29], "rstorssp [ecx]"); - test_display(&[0xf3, 0x66, 0x0f, 0x01, 0x29], "rstorssp [ecx]"); - test_display(&[0xf3, 0x0f, 0xae, 0x30], "clrssbsy [eax]"); + test_display(&[0xf3, 0x0f, 0x01, 0x29], "rstorssp qword [ecx]"); + test_display(&[0xf3, 0x66, 0x0f, 0x01, 0x29], "rstorssp qword [ecx]"); + test_display(&[0xf3, 0x0f, 0xae, 0x30], "clrssbsy qword [eax]"); } #[test] @@ -2187,9 +2942,9 @@ fn test_sse4a() { test_invalid_under(&InstDecoder::minimal(), bytes); } - test_instr(&[0xf2, 0x0f, 0x2b, 0x06], "movntsd [esi], xmm0"); + test_instr(&[0xf2, 0x0f, 0x2b, 0x06], "movntsd qword [esi], xmm0"); test_invalid(&[0xf2, 0x0f, 0x2b, 0xc6]); - test_instr(&[0xf3, 0x0f, 0x2b, 0x06], "movntss [esi], xmm0"); + test_instr(&[0xf3, 0x0f, 0x2b, 0x06], "movntss dword [esi], xmm0"); test_invalid(&[0xf3, 0x0f, 0xba, 0xc6]); test_instr(&[0x66, 0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7"); test_invalid(&[0x66, 0xf2, 0x0f, 0x79, 0x0f]); @@ -2205,10 +2960,10 @@ fn test_sse4a() { #[test] fn test_3dnow() { test_display(&[0x0f, 0x0f, 0xe0, 0x8a], "pfnacc mm4, mm0"); - test_display(&[0x0f, 0x0f, 0x38, 0x8e], "pfpnacc mm7, [eax]"); + test_display(&[0x0f, 0x0f, 0x38, 0x8e], "pfpnacc mm7, qword [eax]"); test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms"); - test_display(&[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4], "pfmax mm4, cs:[ebx + edx * 4 - 0x6d]"); - test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, ss:[eax - 0x5]"); + test_display(&[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4], "pfmax mm4, qword cs:[ebx + edx * 4 - 0x6d]"); + test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[eax - 0x5]"); test_display(&[0x66, 0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6"); test_display(&[0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6"); } @@ -2216,7 +2971,7 @@ fn test_3dnow() { // first appeared in tremont #[test] fn test_direct_stores() { - test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri cs:[ebp + 0x3e], edx"); + test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri dword cs:[ebp + 0x3e], edx"); test_invalid(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07]); } @@ -2242,15 +2997,15 @@ fn test_uintr() { // started shipping in sapphire rapids #[test] fn test_enqcmd() { - test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, ss:[ebx + 0x3f9d1c09]"); - test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, fs:[edx + 0x54]"); + test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, zmmword ss:[ebx + 0x3f9d1c09]"); + test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, zmmword fs:[edx + 0x54]"); } #[test] fn test_gfni() { - test_display(&[0x3e, 0x64, 0x64, 0x66, 0x0f, 0x3a, 0xcf, 0xba, 0x13, 0x23, 0x04, 0xba, 0x6b], "gf2p8affineinvqb xmm7, fs:[edx - 0x45fbdced], 0x6b"); - test_display(&[0x66, 0x36, 0x0f, 0x3a, 0xce, 0x8c, 0x56, 0x9e, 0x82, 0xd1, 0xbe, 0xad], "gf2p8affineqb xmm1, ss:[esi + edx * 2 - 0x412e7d62], 0xad"); - test_display(&[0x66, 0x0f, 0x38, 0xcf, 0x1c, 0x54], "gf2p8mulb xmm3, [esp + edx * 2]"); + test_display(&[0x3e, 0x64, 0x64, 0x66, 0x0f, 0x3a, 0xcf, 0xba, 0x13, 0x23, 0x04, 0xba, 0x6b], "gf2p8affineinvqb xmm7, xmmword fs:[edx - 0x45fbdced], 0x6b"); + test_display(&[0x66, 0x36, 0x0f, 0x3a, 0xce, 0x8c, 0x56, 0x9e, 0x82, 0xd1, 0xbe, 0xad], "gf2p8affineqb xmm1, xmmword ss:[esi + edx * 2 - 0x412e7d62], 0xad"); + test_display(&[0x66, 0x0f, 0x38, 0xcf, 0x1c, 0x54], "gf2p8mulb xmm3, xmmword [esp + edx * 2]"); } #[test] -- cgit v1.1