From 723cbb61c1a8a7aa03fa4e2fc9081c5eb16f53e8 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 4 Jul 2021 15:03:30 -0700
Subject: support avx512 registers >=16

---
 src/long_mode/display.rs      |  4 ++--
 src/protected_mode/display.rs |  4 ++--
 src/real_mode/display.rs      |  4 ++--
 src/shared/evex.in            | 14 ++++++++++++++
 test/long_mode/mod.rs         |  3 +++
 5 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs
index 7f21b35..fb179cc 100644
--- a/src/long_mode/display.rs
+++ b/src/long_mode/display.rs
@@ -116,9 +116,9 @@ const REG_NAMES: &[&'static str] = &[
     "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7", "dr8", "dr9", "dr10", "dr11", "dr12", "dr13", "dr14", "dr15",
     "es", "cs", "ss", "ds", "fs", "gs", "", "",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
-    "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
-    "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
+    "xmm16", "xmm17", "xmm18", "xmm19", "xmm20", "xmm21", "xmm22", "xmm23", "xmm24", "xmm25", "xmm26", "xmm27", "xmm28", "xmm29", "xmm30", "xmm31",
     "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
+    "ymm16", "ymm17", "ymm18", "ymm19", "ymm20", "ymm21", "ymm22", "ymm23", "ymm24", "ymm25", "ymm26", "ymm27", "ymm28", "ymm29", "ymm30", "ymm31",
     "zmm0", "zmm1", "zmm2", "zmm3", "zmm4", "zmm5", "zmm6", "zmm7", "zmm8", "zmm9", "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15", "zmm16", "zmm17", "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23", "zmm24", "zmm25", "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31",
     "st(0)", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
     "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs
index 0b11ea0..f2957d1 100644
--- a/src/protected_mode/display.rs
+++ b/src/protected_mode/display.rs
@@ -114,9 +114,9 @@ const REG_NAMES: &[&'static str] = &[
     "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
     "es", "cs", "ss", "ds", "fs", "gs", "", "",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
-    "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
-    "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
+    "xmm16", "xmm17", "xmm18", "xmm19", "xmm20", "xmm21", "xmm22", "xmm23", "xmm24", "xmm25", "xmm26", "xmm27", "xmm28", "xmm29", "xmm30", "xmm31",
     "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
+    "ymm16", "ymm17", "ymm18", "ymm19", "ymm20", "ymm21", "ymm22", "ymm23", "ymm24", "ymm25", "ymm26", "ymm27", "ymm28", "ymm29", "ymm30", "ymm31",
     "zmm0", "zmm1", "zmm2", "zmm3", "zmm4", "zmm5", "zmm6", "zmm7", "zmm8", "zmm9", "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15", "zmm16", "zmm17", "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23", "zmm24", "zmm25", "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31",
     "st(0)", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
     "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
diff --git a/src/real_mode/display.rs b/src/real_mode/display.rs
index 29bfa3a..9d95020 100644
--- a/src/real_mode/display.rs
+++ b/src/real_mode/display.rs
@@ -114,9 +114,9 @@ const REG_NAMES: &[&'static str] = &[
     "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
     "es", "cs", "ss", "ds", "fs", "gs", "", "",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
-    "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
-    "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
+    "xmm16", "xmm17", "xmm18", "xmm19", "xmm20", "xmm21", "xmm22", "xmm23", "xmm24", "xmm25", "xmm26", "xmm27", "xmm28", "xmm29", "xmm30", "xmm31",
     "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
+    "ymm16", "ymm17", "ymm18", "ymm19", "ymm20", "ymm21", "ymm22", "ymm23", "ymm24", "ymm25", "ymm26", "ymm27", "ymm28", "ymm29", "ymm30", "ymm31",
     "zmm0", "zmm1", "zmm2", "zmm3", "zmm4", "zmm5", "zmm6", "zmm7", "zmm8", "zmm9", "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15", "zmm16", "zmm17", "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23", "zmm24", "zmm25", "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31",
     "st(0)", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
     "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
diff --git a/src/shared/evex.in b/src/shared/evex.in
index f848808..6446b52 100644
--- a/src/shared/evex.in
+++ b/src/shared/evex.in
@@ -71,6 +71,20 @@ pub(crate) fn read_evex<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch a
       let (opcode, operand_code) = table[entry].1[index_lower];
       instruction.opcode = opcode;
       read_evex_operands(words, instruction, operand_code)?;
+      if instruction.prefixes.evex_unchecked().rp() {
+        instruction.regs[0].num |= 0b10000;
+        if ![RegisterBank::X, RegisterBank::Y, RegisterBank::Z].contains(&instruction.regs[0].bank) {
+          return Err(DecodeError::InvalidOperand);
+        }
+      }
+      if instruction.prefixes.evex_unchecked().vex().x() {
+        if instruction.operands.contains(&OperandSpec::RegMMM) {
+          instruction.regs[1].num |= 0b10000;
+          if ![RegisterBank::X, RegisterBank::Y, RegisterBank::Z].contains(&instruction.regs[1].bank) {
+            return Err(DecodeError::InvalidOperand);
+          }
+        }
+      }
       if instruction.prefixes.evex_unchecked().vex().compressed_disp() {
         let overridden_size = match instruction.opcode {
           Opcode::VPEXPANDB => Some(1),
diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index de65a97..4868f39 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -1421,6 +1421,9 @@ fn test_misc() {
 
 #[test]
 fn evex() {
+    test_display(&[0x62, 0xe1, 0x7c, 0x00, 0x14, 0x0a], "vunpcklps xmm17, xmm16, xmmword [rdx]");
+    test_display(&[0x62, 0xe1, 0x7c, 0x08, 0x14, 0x0a], "vunpcklps xmm17, xmm0, xmmword [rdx]");
+    test_display(&[0x62, 0x01, 0x7c, 0x00, 0x14, 0xca], "vunpcklps xmm25, xmm16, xmm26");
     test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa zmm0, zmmword [rax + rax * 2 + 0x40]");
     test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa xmm0, xmmword [rax + rax * 2 + 0x10]");
     test_invalid(&[0x62, 0xf2, 0x7d, 0x1d, 0x66, 0x50, 0x01, 0x11]);
-- 
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