From b71ce923b78c1535dd3b1512bb9edad28a9808ce Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Mon, 3 Aug 2020 01:55:36 -0700
Subject: vpminsw

---
 src/long_mode/display.rs | 2 ++
 src/long_mode/mod.rs     | 2 ++
 src/long_mode/vex.rs     | 5 +++++
 test/long_mode/mod.rs    | 2 ++
 4 files changed, 11 insertions(+)

diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs
index 8c73d1a..e2943d3 100644
--- a/src/long_mode/display.rs
+++ b/src/long_mode/display.rs
@@ -929,6 +929,7 @@ const MNEMONICS: &[&'static str] = &[
     "vpmaxsw",
     "vpmaxub",
     "vpmaxud",
+    "vpminsw",
     "vpminsd",
     "vpminud",
     "vpmovmskb",
@@ -2027,6 +2028,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::VPMAXSW |
             Opcode::VPMAXUB |
             Opcode::VPMAXUD |
+            Opcode::VPMINSW |
             Opcode::VPMINSD |
             Opcode::VPMINUD |
             Opcode::VPTEST |
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 04d1fc6..5f08a16 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -1221,6 +1221,7 @@ pub enum Opcode {
     VPMAXSW,
     VPMAXUB,
     VPMAXUD,
+    VPMINSW,
     VPMINSD,
     VPMINUD,
     VPMOVMSKB,
@@ -2739,6 +2740,7 @@ impl InstDecoder {
             Opcode::VPMAXSW |
             Opcode::VPMAXUB |
             Opcode::VPMAXUD |
+            Opcode::VPMINSW |
             Opcode::VPMINSD |
             Opcode::VPMINUD |
             Opcode::VPMOVMSKB |
diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs
index 8325e3f..bab8167 100644
--- a/src/long_mode/vex.rs
+++ b/src/long_mode/vex.rs
@@ -1364,6 +1364,11 @@ fn read_vex_instruction<T: Iterator<Item=u8>>(opcode_map: VEXOpcodeMap, bytes: &
                         } else {
                             VEXOperandCode::G_V_E_xmm
                         }),
+                        0xEA => (Opcode::VPMINSW, if L {
+                            VEXOperandCode::G_V_E_ymm
+                        } else {
+                            VEXOperandCode::G_V_E_xmm
+                        }),
                         0xEB => (Opcode::VPOR, if L {
                             VEXOperandCode::G_V_E_ymm
                         } else {
diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index 67b2b66..7293b29 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -1387,6 +1387,8 @@ fn test_vex() {
     test_instr_invalid(&[0xc4, 0xe3, 0xf9, 0x14, 0x00, 0x0a]);
     test_instr(&[0xc5, 0xed, 0x71, 0xd0, 0x04], "vpsrlw ymm2, ymm0, 0x4");
     test_instr(&[0xc4, 0xe3, 0xfd, 0x00, 0xc1, 0xa8], "vpermq ymm0, ymm1, 0xa8");
+    test_instr(&[0xc5, 0xfd, 0xea, 0xd1], "vpminsw ymm2, ymm0, ymm1");
+    test_instr(&[0xc5, 0xfd, 0xee, 0xd9], "vpmaxsw ymm3, ymm0, ymm1");
 }
 
 #[test]
-- 
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