From f3d52fcb08b4d1ef05583e1ca302e450e7c7b181 Mon Sep 17 00:00:00 2001 From: iximeow Date: Fri, 22 May 2026 05:49:01 +0000 Subject: pusha/popa/push-imm memory sizes --- CHANGELOG | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'CHANGELOG') diff --git a/CHANGELOG b/CHANGELOG index b42570b..3af20cc 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -11,9 +11,8 @@ (RegSpec::xmm, RegSpec::q, RegSpec::d, RegSpec::st, etc) * for uarch-specific decoding, there is now a feature bit for Intel Key Locker. this corrects an issue where Key Locker instructions would decode under AMD-specific decoders. -* push-immediate, pushf, popf, enter, leave, and xlat now all report a correct memory - access size, fixing the prior behavior of reporting no memory access size at - all +* push-immediate, pushf, popf, pusha, popa, enter, leave, and xlat now all report a correct memory + access size, fixing the prior behavior of reporting no memory access size at all * table load/store instructions (lgdt, lidt, lldt, sgdt, sidt, sldt) have correct (mode-dependent) memory access sizes, rather than incorrectly varying on operand-size overrides. * 64-bit mode: mov seg-to-reg uses 32-bit GPRs for the destination rather than 16-bit. -- cgit v1.1