From da63e8df700520ad396b754427f90ef92cc2425d Mon Sep 17 00:00:00 2001 From: iximeow Date: Sun, 1 Dec 2019 05:15:59 -0800 Subject: down to one failing test, for now --- src/lib.rs | 61 ++++++++++++++++++++++++++++++++++++++++++++----------------- 1 file changed, 44 insertions(+), 17 deletions(-) (limited to 'src/lib.rs') diff --git a/src/lib.rs b/src/lib.rs index 815f51b..c827dfb 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1134,7 +1134,6 @@ pub enum OperandCode { Yv_AX, Yv_Xv, G_E_q, - G_U_mm, G_M_q, E_G_q, Rv_Gmm_Ib, @@ -1238,6 +1237,7 @@ pub enum OperandCode { E_G_mm = 0xeb, G_xmm_E_mm = 0xed, G_xmm_Edq = 0xef, + G_U_mm = 0xf1, } fn base_opcode_map(v: u8) -> Opcode { @@ -2247,22 +2247,22 @@ const OPCODE_0F_MAP: [OpcodeRecord; 256] = [ OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKLBW), OperandCode::G_E_mm), OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKLWD), OperandCode::G_E_mm), OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKLDQ), OperandCode::G_E_mm), - OpcodeRecord(Interpretation::Instruction(Opcode::PACKSSWB), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PCMPGTB), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PCMPGTW), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PCMPGTD), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PACKUSWB), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKHBW), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKHWD), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKHDQ), OperandCode::Unsupported), - OpcodeRecord(Interpretation::Instruction(Opcode::PACKSSDW), OperandCode::Unsupported), + OpcodeRecord(Interpretation::Instruction(Opcode::PACKSSWB), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PCMPGTB), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PCMPGTW), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PCMPGTD), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PACKUSWB), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKHBW), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKHWD), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PUNPCKHDQ), OperandCode::G_E_mm), + OpcodeRecord(Interpretation::Instruction(Opcode::PACKSSDW), OperandCode::G_E_mm), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), OpcodeRecord(Interpretation::Instruction(Opcode::MOVD), OperandCode::G_mm_Edq), OpcodeRecord(Interpretation::Instruction(Opcode::MOVQ), OperandCode::G_mm_E), // 0x70 - OpcodeRecord(Interpretation::Instruction(Opcode::PSHUFW), OperandCode::Unsupported), + OpcodeRecord(Interpretation::Instruction(Opcode::PSHUFW), OperandCode::G_E_xmm_Ib), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f71), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f72), OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f73), @@ -3444,27 +3444,54 @@ pub fn read_operands>(mut bytes_iter: T, instruction: &mut instruction.operand_count = 2; }, OperandCode::G_E_mm => { + instruction.operands[1] = mem_oper; + instruction.modrm_rrr.bank = RegisterBank::MM; + instruction.modrm_rrr.num &= 0b111; + if mem_oper == OperandSpec::RegMMM { + instruction.modrm_mmm.bank = RegisterBank::MM; + instruction.modrm_mmm.num &= 0b111; + } + instruction.operand_count = 2; + }, + OperandCode::G_U_mm => { + instruction.operands[1] = mem_oper; + instruction.modrm_rrr.bank = RegisterBank::D; + if mem_oper != OperandSpec::RegMMM { + return Err(()); + } + instruction.modrm_mmm.bank = RegisterBank::MM; + instruction.modrm_mmm.num &= 0b111; + instruction.operand_count = 2; + }, + OperandCode::G_E_xmm => { let modrm = read_modrm(&mut bytes_iter, instruction, length)?; bytes_read = 1; // println!("mod_bits: {:2b}, r: {:3b}, m: {:3b}", mod_bits, r, m); instruction.operands[1] = read_E_xmm(&mut bytes_iter, instruction, modrm, length)?; instruction.modrm_rrr = - RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), RegisterBank::MM); + RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), RegisterBank::X); instruction.operands[0] = OperandSpec::RegRRR; instruction.operand_count = 2; }, - OperandCode::G_E_xmm => { + OperandCode::G_mm_Ew_Ib => { let modrm = read_modrm(&mut bytes_iter, instruction, length)?; bytes_read = 1; // println!("mod_bits: {:2b}, r: {:3b}, m: {:3b}", mod_bits, r, m); - instruction.operands[1] = read_E_xmm(&mut bytes_iter, instruction, modrm, length)?; + instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 4, length)?; instruction.modrm_rrr = - RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), RegisterBank::X); + RegSpec::from_parts((modrm >> 3) & 7, false, RegisterBank::MM); instruction.operands[0] = OperandSpec::RegRRR; - instruction.operand_count = 2; - }, + if instruction.operands[1] == OperandSpec::RegMMM { + instruction.modrm_mmm.bank = RegisterBank::D; + } + instruction.imm = + read_num(&mut bytes_iter, 1)? as u8 as u64; + *length += 1; + instruction.operands[2] = OperandSpec::ImmI8; + instruction.operand_count = 3; + } OperandCode::AL_Ib => { instruction.modrm_rrr = RegSpec::al(); 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