From d8d1662bc0469901a25658679e07082aa4d71d22 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Fri, 5 Jun 2026 08:35:17 +0000
Subject: 64-bit: vex-prefix register extension..

---
 src/long_mode/mod.rs | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

(limited to 'src/long_mode/mod.rs')

diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 548aec3..9f04198 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -8745,7 +8745,7 @@ fn read_operands<
                             } else {
                                 RegisterBank::D
                             };
-                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth);
+                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth);
                             instruction.operands[0] = OperandSpec::RegMMM;
                             instruction.operand_count = 1;
                         }
@@ -8756,7 +8756,7 @@ fn read_operands<
                             } else {
                                 RegisterBank::D
                             };
-                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth);
+                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth);
                             instruction.operands[0] = OperandSpec::RegMMM;
                             instruction.operand_count = 1;
 
@@ -8768,7 +8768,7 @@ fn read_operands<
                             } else {
                                 RegisterBank::D
                             };
-                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth);
+                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth);
                             instruction.operands[0] = OperandSpec::RegMMM;
                             instruction.operand_count = 1;
                         }
@@ -8779,7 +8779,7 @@ fn read_operands<
                             } else {
                                 RegisterBank::D
                             };
-                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth);
+                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth);
                             instruction.operands[0] = OperandSpec::RegMMM;
                             instruction.operand_count = 1;
                         }
@@ -8790,7 +8790,8 @@ fn read_operands<
                             } else {
                                 RegisterBank::D
                             };
-                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth);
+                            // incssp register is extended by rex.b????
+                            instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth);
                             instruction.operands[0] = OperandSpec::RegMMM;
                             instruction.operand_count = 1;
                         }
-- 
cgit v1.1