From 1130f9f3270be56f2dd77361c34412a43e2b795e Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 5 Feb 2023 15:30:51 -0800
Subject: more micro-opts...

set_embedded_instructions was unnecessarily appilied to many operand
codes; this was never a correctness issue, but meant many operand
decodings took a few more instruction than necessary to do nothing.

setting all registers to `rax` is unnecessary, only the first register's
defaulting to `rax` is effectual. this allows for not using a movabs to
load initial rax state.

adjust vex decoder inlining. this will be followed up by some cleanup
for vex operand codes.
---
 src/long_mode/vex.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/long_mode/vex.rs')

diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs
index 31f9e11..24ff2a8 100644
--- a/src/long_mode/vex.rs
+++ b/src/long_mode/vex.rs
@@ -102,7 +102,7 @@ enum VEXOperandCode {
     MXCSR,
 }
 
-#[inline(never)]
+#[inline(always)]
 pub(crate) fn three_byte_vex<
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>,
@@ -224,6 +224,7 @@ pub(crate) fn three_byte_vex<
     read_vex_instruction(m, words, instruction, p, sink)
 }
 
+#[inline(always)]
 pub(crate) fn two_byte_vex<
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>,
-- 
cgit v1.1