From 11ce930421ba8b534024f6695dff8fdfd7e47ff0 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sat, 3 Jul 2021 14:41:09 -0700 Subject: support AMD `sev_snp` --- src/long_mode/display.rs | 8 ++++++++ src/long_mode/mod.rs | 37 +++++++++++++++++++++++++++++++++++-- 2 files changed, 43 insertions(+), 2 deletions(-) (limited to 'src/long_mode') diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs index b9e4a92..b1fb7f8 100644 --- a/src/long_mode/display.rs +++ b/src/long_mode/display.rs @@ -1800,6 +1800,10 @@ const MNEMONICS: &[&'static str] = &[ "vpandnq", "vpandd", "vpandq", + "psmash", + "pvalidate", + "rmpadjust", + "rmpupdate", ]; impl Opcode { @@ -3091,6 +3095,10 @@ impl Colorize for Opcode { Opcode::INVLPGA | Opcode::INVLPGB | Opcode::TLBSYNC | + Opcode::PSMASH | + Opcode::PVALIDATE | + Opcode::RMPADJUST | + Opcode::RMPUPDATE | Opcode::CPUID | Opcode::WBINVD | Opcode::INVD | diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 8ed68fb..9111faa 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -2515,6 +2515,11 @@ pub enum Opcode { VPANDNQ, VPANDD, VPANDQ, + + PSMASH, + PVALIDATE, + RMPADJUST, + RMPUPDATE, } impl PartialEq for Instruction { @@ -9502,7 +9507,21 @@ fn unlikely_operands::Address, ::Address,