From 470ddb9a0329a8f1823674bca2c108e012ca2780 Mon Sep 17 00:00:00 2001 From: iximeow Date: Fri, 17 Apr 2026 02:22:24 +0000 Subject: more precise about 0f0d prefetch/nop --- src/long_mode/mod.rs | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src/long_mode') diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 4288eb9..5e8dafa 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -7223,8 +7223,6 @@ fn read_operands< OperandCase::ModRM_0x0f0d => { let r = instruction.regs[0].num & 0b111; - let bank = bank_from_prefixes_64(SizeCode::vq, instruction.prefixes); - match r { 1 => { instruction.opcode = Opcode::PREFETCHW; @@ -7233,12 +7231,14 @@ fn read_operands< instruction.opcode = Opcode::NOP; } } - instruction.operands[0] = mem_oper; - if instruction.operands[0] != OperandSpec::RegMMM { - instruction.mem_size = 64; - } else { - instruction.regs[1].bank = bank; + if mem_oper == OperandSpec::RegMMM { + // *found* this from running `0f0dc0` under KVM on a Zen 5 system. this is + // consistent with the register number being used to pick kinds of prefetch. + return Err(DecodeError::InvalidOperand); } + + instruction.operands[0] = mem_oper; + instruction.mem_size = 64; instruction.operand_count = 1; } OperandCase::ModRM_0x0f0f => { -- cgit v1.1