From 7e154da8e2bd7b8892bdefe2f71c111c2135b0a3 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sat, 3 Jul 2021 15:51:22 -0700
Subject: be more strict about denying invalid operands

---
 src/long_mode/mod.rs | 2 +-
 src/long_mode/vex.rs | 6 +++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

(limited to 'src/long_mode')

diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index f8704c0..f2b2b57 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -6943,7 +6943,7 @@ fn read_0f38_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {
 
 fn read_0f3a_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {
     if prefixes.rep() {
-        if prefixes.operand_size() || prefixes.repnz() {
+        if prefixes != &Prefixes::new(0x10) {
             return OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing);
         }
         return match opcode {
diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs
index 7f8252f..d69a411 100644
--- a/src/long_mode/vex.rs
+++ b/src/long_mode/vex.rs
@@ -1599,7 +1599,11 @@ fn read_vex_instruction<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch a
                         } else {
                             VEXOperandCode::G_V_E_xmm
                         }),
-                        0x16 => (Opcode::VMOVHPD, VEXOperandCode::G_V_M_xmm),
+                        0x16 => (Opcode::VMOVHPD, if L {
+                            return Err(DecodeError::InvalidOpcode);
+                        } else {
+                            VEXOperandCode::G_V_M_xmm
+                        }),
                         0x17 => (Opcode::VMOVHPD, if L {
                             instruction.opcode = Opcode::Invalid;
                             return Err(DecodeError::InvalidOpcode);
-- 
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