From 0fff2a6aa0832b1cabf381e0c970f0fd47223224 Mon Sep 17 00:00:00 2001 From: iximeow Date: Mon, 22 Mar 2021 23:08:54 -0700 Subject: port long-mode decoder updates to protected-mode --- src/protected_mode/vex.rs | 41 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 38 insertions(+), 3 deletions(-) (limited to 'src/protected_mode/vex.rs') diff --git a/src/protected_mode/vex.rs b/src/protected_mode/vex.rs index 497c25d..ce40e6e 100644 --- a/src/protected_mode/vex.rs +++ b/src/protected_mode/vex.rs @@ -923,6 +923,21 @@ fn read_vex_instruction>(opcode_map: VEXOpcodeMap, bytes: & } else { VEXOperandCode::G_E_xmm }), + 0x54 => (Opcode::VANDPS, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), + 0x55 => (Opcode::VANDNPS, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), + 0x56 => (Opcode::VORPS, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), 0x57 => (Opcode::VXORPS, if L { VEXOperandCode::G_V_E_ymm } else { @@ -987,8 +1002,8 @@ fn read_vex_instruction>(opcode_map: VEXOpcodeMap, bytes: & }, VEXOpcodePrefix::Prefix66 => { match opc { - 0x0a => (Opcode::VROUNDSS, VEXOperandCode::G_V_E_xmm_imm8), - 0x0b => (Opcode::VROUNDSD, VEXOperandCode::G_V_E_xmm_imm8), +// 0x0a => (Opcode::VROUNDSS, VEXOperandCode::G_V_E_xmm_imm8), +// 0x0b => (Opcode::VROUNDSD, VEXOperandCode::G_V_E_xmm_imm8), 0x10 => (Opcode::VMOVUPD, if L { VEXOperandCode::G_E_ymm } else { @@ -1060,6 +1075,21 @@ fn read_vex_instruction>(opcode_map: VEXOpcodeMap, bytes: & } else { VEXOperandCode::G_E_xmm }), + 0x54 => (Opcode::VANDPD, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), + 0x55 => (Opcode::VANDNPD, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), + 0x56 => (Opcode::VORPD, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), 0x57 => (Opcode::VXORPD, if L { VEXOperandCode::G_V_E_ymm } else { @@ -1617,7 +1647,7 @@ fn read_vex_instruction>(opcode_map: VEXOpcodeMap, bytes: & 0x5e => (Opcode::VDIVSS, VEXOperandCode::G_V_E_xmm), 0x5f => (Opcode::VMAXSS, VEXOperandCode::G_V_E_xmm), 0x6f => (Opcode::VMOVDQU, if L { VEXOperandCode::G_E_ymm } else { VEXOperandCode::G_E_xmm }), - 0x70 => (Opcode::VMOVSHDUP, if L { VEXOperandCode::G_E_ymm_imm8 } else { VEXOperandCode::G_E_xmm_imm8 }), +// 0x70 => (Opcode::VMOVSHDUP, if L { VEXOperandCode::G_E_ymm_imm8 } else { VEXOperandCode::G_E_xmm_imm8 }), 0x7e => (Opcode::VMOVQ, if L { instruction.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOpcode); } else { VEXOperandCode::G_E_xmm }), 0x7f => (Opcode::VMOVDQU, if L { VEXOperandCode::E_G_ymm } else { VEXOperandCode::E_G_xmm }), 0xc2 => (Opcode::VCMPSS, VEXOperandCode::G_V_E_xmm_imm8), @@ -1889,6 +1919,11 @@ fn read_vex_instruction>(opcode_map: VEXOpcodeMap, bytes: & } else { VEXOperandCode::G_V_E_xmm }), + 0x3E => (Opcode::VPMAXUW, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), 0x3F => (Opcode::VPMAXUD, if L { VEXOperandCode::G_V_E_ymm } else { -- cgit v1.1