From f718fca4dbe146d3abd3aba35751b37e85d64917 Mon Sep 17 00:00:00 2001 From: iximeow Date: Mon, 28 Jun 2021 23:14:51 -0700 Subject: remove a few operand cases vex decoding is really intended to avoid explosions in code size more than anything... --- src/protected_mode/vex.rs | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/protected_mode/vex.rs') diff --git a/src/protected_mode/vex.rs b/src/protected_mode/vex.rs index d9802d0..424c6b6 100644 --- a/src/protected_mode/vex.rs +++ b/src/protected_mode/vex.rs @@ -108,7 +108,6 @@ pub(crate) fn three_byte_vex>(bytes: &mut T, vex_byte_one: _ => { unreachable!("p is two bits"); } }; let m = vex_byte_one & 0b11111; -// println!("m: {:05b}", m); let m = match m { 0b00001 => VEXOpcodeMap::Map0F, 0b00010 => VEXOpcodeMap::Map0F38, @@ -141,11 +140,12 @@ pub(crate) fn two_byte_vex>(bytes: &mut T, vex_byte: u8, in }; instruction.vex_reg = RegSpec { bank: RegisterBank::X, - num: ((vex_byte >> 3) & 0b0111) ^ 0b0111, + num: ((vex_byte >> 3) & 0b1111) ^ 0b1111, }; instruction.prefixes.vex_from_c5(vex_byte); read_vex_instruction(VEXOpcodeMap::Map0F, bytes, instruction, &mut length, p)?; + instruction.vex_reg.num &= 0b0111; // ignore bit 4 in 32-bit mode instruction.length = length; Ok(()) } @@ -1349,7 +1349,6 @@ fn read_vex_operands>(bytes: &mut T, instruction: &mut Inst } instruction.operand_count = 4; Ok(()) - } } -- cgit v1.1