From 2a3b81c024c28f1676046918c2ceecee8fe7777d Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 4 Jul 2021 12:54:48 -0700
Subject: 16-bit addressing in protected mode may see avx512 masks too

---
 src/protected_mode/mod.rs | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

(limited to 'src/protected_mode')

diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index a6ad2ee..f5d7981 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -513,6 +513,8 @@ impl OperandSpec {
             OperandSpec::RegDisp => OperandSpec::RegDisp_mask,
             OperandSpec::RegScale => OperandSpec::RegScale_mask,
             OperandSpec::RegScaleDisp => OperandSpec::RegScaleDisp_mask,
+            OperandSpec::RegIndexBase => OperandSpec::RegIndexBase_mask,
+            OperandSpec::RegIndexBaseDisp => OperandSpec::RegIndexBaseDisp_mask,
             OperandSpec::RegIndexBaseScale => OperandSpec::RegIndexBaseScale_mask,
             OperandSpec::RegIndexBaseScaleDisp => OperandSpec::RegIndexBaseScaleDisp_mask,
             o => o,
@@ -536,6 +538,8 @@ impl OperandSpec {
             OperandSpec::RegDisp_mask |
             OperandSpec::RegScale_mask |
             OperandSpec::RegScaleDisp_mask |
+            OperandSpec::RegIndexBase_mask |
+            OperandSpec::RegIndexBaseDisp_mask |
             OperandSpec::RegIndexBaseScale_mask |
             OperandSpec::RegIndexBaseScaleDisp_mask => {
                 true
@@ -755,6 +759,20 @@ impl Operand {
                     Operand::RegScaleDisp(inst.regs[2], inst.scale, inst.disp as i32)
                 }
             }
+            OperandSpec::RegIndexBase_mask => {
+                if inst.prefixes.evex_unchecked().mask_reg() != 0 {
+                    Operand::RegIndexBaseMasked(inst.regs[1], inst.regs[2], RegSpec::mask(inst.prefixes.evex_unchecked().mask_reg()))
+                } else {
+                    Operand::RegIndexBase(inst.regs[1], inst.regs[2])
+                }
+            }
+            OperandSpec::RegIndexBaseDisp_mask => {
+                if inst.prefixes.evex_unchecked().mask_reg() != 0 {
+                    Operand::RegIndexBaseDispMasked(inst.regs[1], inst.regs[2], inst.disp as i32, RegSpec::mask(inst.prefixes.evex_unchecked().mask_reg()))
+                } else {
+                    Operand::RegIndexBaseDisp(inst.regs[1], inst.regs[2], inst.disp as i32)
+                }
+            }
             OperandSpec::RegIndexBaseScale_mask => {
                 if inst.prefixes.evex_unchecked().mask_reg() != 0 {
                     Operand::RegIndexBaseScaleMasked(inst.regs[1], inst.regs[2], inst.scale, RegSpec::mask(inst.prefixes.evex_unchecked().mask_reg()))
@@ -2707,6 +2725,8 @@ enum OperandSpec {
     RegDisp_mask,
     RegScale_mask,
     RegScaleDisp_mask,
+    RegIndexBase_mask,
+    RegIndexBaseDisp_mask,
     RegIndexBaseScale_mask,
     RegIndexBaseScaleDisp_mask,
 }
-- 
cgit v1.1