From 2e34ef39d75caeb10c499712bc28ac9de8abf984 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sat, 3 Jul 2021 13:38:48 -0700 Subject: prefixes on 0f01-series opcodes are more strict --- src/protected_mode/mod.rs | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) (limited to 'src/protected_mode') diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index c9a2de0..4937602 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -8930,10 +8930,6 @@ fn unlikely_operands::Address, { - if instruction.prefixes.rep() || instruction.prefixes.repnz() { - return Err(DecodeError::InvalidOperand); - } - let opwidth = if instruction.prefixes.operand_size() { 2 } else { @@ -8945,6 +8941,10 @@ fn unlikely_operands::Address, > 6; let m = modrm & 7; if mod_bits == 0b11 { + if instruction.prefixes.rep() || instruction.prefixes.repnz() || instruction.prefixes.operand_size() { + return Err(DecodeError::InvalidOperand); + } + instruction.operands[0] = OperandSpec::Nothing; instruction.operand_count = 0; match m { @@ -8979,6 +8979,9 @@ fn unlikely_operands::Address, { @@ -8998,9 +9001,6 @@ fn unlikely_operands::Address, { instruction.opcode = Opcode::MONITOR; @@ -9032,6 +9032,10 @@ fn unlikely_operands::Address, > 6; let m = modrm & 7; if mod_bits == 0b11 { + if instruction.prefixes.rep() || instruction.prefixes.repnz() || instruction.prefixes.operand_size() { + return Err(DecodeError::InvalidOperand); + } + instruction.operands[0] = OperandSpec::Nothing; instruction.operand_count = 0; match m { @@ -9067,6 +9071,10 @@ fn unlikely_operands::Address, > 6; let m = modrm & 7; if mod_bits == 0b11 { + if instruction.prefixes.rep() || instruction.prefixes.repnz() || instruction.prefixes.operand_size() { + return Err(DecodeError::InvalidOperand); + } + match m { 0b000 => { instruction.opcode = Opcode::VMRUN; @@ -9271,6 +9279,10 @@ fn unlikely_operands::Address, ::Address,