From 42f9eed1f20ffa33ca72c18e6600d03483c5bc77 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sun, 23 Jun 2024 10:45:10 -0700 Subject: port opcode helpers and reordering to 32-bit and 16-bit decoders --- src/protected_mode/display.rs | 14 +++++++------- src/protected_mode/mod.rs | 28 ++++++++++++++++++++-------- 2 files changed, 27 insertions(+), 15 deletions(-) (limited to 'src/protected_mode') diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs index 89b7565..ed5d902 100644 --- a/src/protected_mode/display.rs +++ b/src/protected_mode/display.rs @@ -376,6 +376,13 @@ const MNEMONICS: &[&'static str] = &[ "not", "xadd", "xchg", + "cmps", + "scas", + "movs", + "lods", + "stos", + "ins", + "outs", "invalid", "bt", "bsf", @@ -457,17 +464,10 @@ const MNEMONICS: &[&'static str] = &[ "cwd", "cdq", "cqo", - "lods", - "stos", "lahf", "sahf", - "cmps", - "scas", - "movs", "test", - "ins", "in", - "outs", "out", "imul", "jo", diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index cf72fda..482a921 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -968,7 +968,16 @@ pub enum Opcode { NOT = 0x1019, XADD = 0x101a, XCHG = 0x101b, - Invalid = 0x1c, + + CMPS = 0x201c, + SCAS = 0x201d, + MOVS = 0x201e, + LODS = 0x201f, + STOS = 0x2020, + INS = 0x2021, + OUTS = 0x2022, + + Invalid = 0x23, // XADD, BT, // BTS, @@ -1053,17 +1062,10 @@ pub enum Opcode { CWD, CDQ, CQO, - LODS, - STOS, LAHF, SAHF, - CMPS, - SCAS, - MOVS, TEST, - INS, IN, - OUTS, OUT, IMUL, JO, @@ -4217,6 +4219,16 @@ impl Opcode { _ => None, } } + + #[inline(always)] + fn can_lock(&self) -> bool { + (*self as u32) & 0x1000 != 0 + } + + #[inline(always)] + fn can_rep(&self) -> bool { + (*self as u32) & 0x2000 != 0 + } } impl Default for Instruction { -- cgit v1.1