From 57ff56d8b5c3a3fa4f1d7f4881afbe2ce8e47cfd Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 9 Aug 2020 19:25:07 -0700
Subject: support salc, get segment register numbers right

---
 src/protected_mode/display.rs |  4 +++-
 src/protected_mode/mod.rs     | 15 ++++++++-------
 2 files changed, 11 insertions(+), 8 deletions(-)

(limited to 'src/protected_mode')

diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs
index 171118a..c92737b 100644
--- a/src/protected_mode/display.rs
+++ b/src/protected_mode/display.rs
@@ -123,7 +123,7 @@ const REG_NAMES: &[&'static str] = &[
     "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
     "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
     "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
-    "cs", "ds", "es", "fs", "gs", "ss", "", "",
+    "es", "cs", "ss", "ds", "fs", "gs", "", "",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
     "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
@@ -1113,6 +1113,7 @@ const MNEMONICS: &[&'static str] = &[
     "wrfsbase",
     "wrgsbase",
     "crc32",
+    "salc",
     "xlat",
 
     "f2xm1",
@@ -1968,6 +1969,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::FCMOVNE |
             Opcode::FCMOVNU |
             Opcode::FCMOVU |
+            Opcode::SALC |
             Opcode::SETO |
             Opcode::SETNO |
             Opcode::SETB |
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 8ac87be..42595a8 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -112,32 +112,32 @@ impl RegSpec {
 
     #[inline]
     pub fn cs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 0 }
+        RegSpec { bank: RegisterBank::S, num: 1 }
     }
 
     #[inline]
     pub fn ds() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 1 }
+        RegSpec { bank: RegisterBank::S, num: 3 }
     }
 
     #[inline]
     pub fn es() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 2 }
+        RegSpec { bank: RegisterBank::S, num: 0 }
     }
 
     #[inline]
     pub fn ss() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 5 }
+        RegSpec { bank: RegisterBank::S, num: 2 }
     }
 
     #[inline]
     pub fn fs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 3 }
+        RegSpec { bank: RegisterBank::S, num: 4 }
     }
 
     #[inline]
     pub fn gs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 4 }
+        RegSpec { bank: RegisterBank::S, num: 5 }
     }
 
     #[inline]
@@ -1407,6 +1407,7 @@ pub enum Opcode {
     WRGSBASE,
 
     CRC32,
+    SALC,
     XLAT,
 
     F2XM1,
@@ -5149,7 +5150,7 @@ const OPCODES: [OpcodeRecord; 256] = [
     OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xd3_Ev_CL),
     OpcodeRecord(Interpretation::Instruction(Opcode::AMX), OperandCode::Ib),
     OpcodeRecord(Interpretation::Instruction(Opcode::ADX), OperandCode::Ib),
-    OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
+    OpcodeRecord(Interpretation::Instruction(Opcode::SALC), OperandCode::Nothing),
     // XLAT
     OpcodeRecord(Interpretation::Instruction(Opcode::XLAT), OperandCode::Nothing),
     // x86 d8
-- 
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