From 582c4e44579d4bbb9dcec9d12c23c8b774db3cfb Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sat, 3 Jul 2021 14:43:52 -0700
Subject: do not reject prefixed sgdt, add a TODO for xop

not that xop will ever be wanted, rip
---
 src/protected_mode/mod.rs | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

(limited to 'src/protected_mode')

diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 0497db6..c9ba9f2 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -6868,6 +6868,9 @@ fn read_0f38_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {
 
 fn read_0f3a_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {
     if prefixes.rep() {
+        if prefixes.operand_size() || prefixes.repnz() {
+            return OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing);
+        }
         return match opcode {
             0xf0 => OpcodeRecord(Interpretation::Instruction(Opcode::HRESET), OperandCode::ModRM_0xf30f3af0),
             _ => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
@@ -7517,7 +7520,8 @@ fn read_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpe
             instruction.operands[0] = mem_oper;
             let r = (modrm >> 3) & 7;
             if r >= 1 {
-                return Err(DecodeError::InvalidOpcode);
+                // TODO: this is where XOP decoding would occur
+                return Err(DecodeError::IncompleteDecoder);
             }
             instruction.opcode = [
                 Opcode::POP,
@@ -9119,10 +9123,6 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y
                 let mod_bits = modrm >> 6;
                 let m = modrm & 7;
                 if mod_bits == 0b11 {
-                    if instruction.prefixes.rep() || instruction.prefixes.repnz() || instruction.prefixes.operand_size() {
-                        return Err(DecodeError::InvalidOperand);
-                    }
-
                     match m {
                         0b000 => {
                             instruction.opcode = Opcode::VMRUN;
-- 
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