From 43a6554770d6bfd74c05d37af772e0a65ef54ab1 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sun, 5 Jul 2026 01:44:03 +0000 Subject: some doc comments covered incorrect modes --- src/real_mode/mod.rs | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/real_mode/mod.rs') diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs index 4049a97..03d251b 100644 --- a/src/real_mode/mod.rs +++ b/src/real_mode/mod.rs @@ -41,7 +41,7 @@ impl fmt::Display for DecodeError { /// an `x86` register, including its number and type. if `fmt` is enabled, name too. /// /// ``` -/// use yaxpeax_x86::long_mode::{RegSpec, register_class}; +/// use yaxpeax_x86::real_mode::{RegSpec, register_class}; /// /// assert_eq!(RegSpec::ecx().num(), 1); /// assert_eq!(RegSpec::ecx().class(), register_class::D); @@ -68,7 +68,7 @@ impl Hash for RegSpec { /// /// these are only obtained through [`Opcode::condition()`]: /// ``` -/// use yaxpeax_x86::long_mode::{Opcode, ConditionCode}; +/// use yaxpeax_x86::real_mode::{Opcode, ConditionCode}; /// /// assert_eq!(Opcode::JB.condition(), Some(ConditionCode::B)); /// ``` @@ -3317,13 +3317,13 @@ impl Instruction { /// later. see the documentation on [`display::DisplayStyle`] for more. /// /// ``` - /// use yaxpeax_x86::long_mode::{InstDecoder, DisplayStyle}; + /// use yaxpeax_x86::real_mode::{InstDecoder, DisplayStyle}; /// /// let decoder = InstDecoder::default(); /// let inst = decoder.decode_slice(&[0x33, 0xc1]).unwrap(); /// - /// assert_eq!("eax ^= ecx", inst.display_with(DisplayStyle::C).to_string()); - /// assert_eq!("xor eax, ecx", inst.display_with(DisplayStyle::Intel).to_string()); + /// assert_eq!("ax ^= cx", inst.display_with(DisplayStyle::C).to_string()); + /// assert_eq!("xor ax, cx", inst.display_with(DisplayStyle::Intel).to_string()); /// ``` pub fn display_with<'a>(&'a self, style: display::DisplayStyle) -> display::InstructionDisplayer<'a> { display::InstructionDisplayer { @@ -5288,7 +5288,7 @@ pub enum InnerDescription { /// displaying for human consumption. OperandCode(OperandCodeWrapper), /// a decoded register: a name for the bits used to decode it, the register number those bits - /// specify, and the fully-constructed [`long_mode::RegSpec`] that was decoded. + /// specify, and the fully-constructed [`real_mode::RegSpec`] that was decoded. RegisterNumber(&'static str, u8, RegSpec), /// a miscellaneous string describing some bits of the instruction. this may describe a prefix, /// internal details of a prefix, error or constraints on an opcode, operand encoding details, -- cgit v1.1