From 8a2dd6bcf37a3ebb43e2153a306cf0250637c116 Mon Sep 17 00:00:00 2001 From: iximeow Date: Mon, 9 Mar 2026 16:36:00 +0000 Subject: pushf, popf, enter, leave, xlat all have implicit memory access also add "is_masked" to operand spec --- src/long_mode/mod.rs | 14 +++++++++++++- src/protected_mode/mod.rs | 14 +++++++++++++- src/real_mode/mod.rs | 14 +++++++++++++- 3 files changed, 39 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 0ffc9f5..f3b4dc0 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -474,6 +474,9 @@ impl OperandSpec { fn is_memory(&self) -> bool { (*self as u8) & 0x80 != 0 } + fn is_masked(&self) -> bool { + (*self as u8) & 0x40 != 0 + } } /// an `avx512` merging mode. @@ -6619,8 +6622,15 @@ fn read_operands< instruction.mem_size = 8; } else if instruction.opcode == Opcode::RETF { instruction.mem_size = 10; + } else if instruction.opcode == Opcode::POPF { + instruction.mem_size = 8; + } else if instruction.opcode == Opcode::PUSHF { + instruction.mem_size = 8; + } else if instruction.opcode == Opcode::LEAVE { + instruction.mem_size = 8; + } else if instruction.opcode == Opcode::XLAT { + instruction.mem_size = 1; } - // TODO: leave? instruction.operands[0] = OperandSpec::Nothing; instruction.operand_count = 0; return Ok(()); @@ -7102,6 +7112,8 @@ fn read_operands< instruction.imm = read_num(words, 1)? as u64; instruction.operands[0] = OperandSpec::ImmInDispField; instruction.operands[1] = OperandSpec::ImmU8; + // because there is an implied push of the adjusted base pointer + instruction.mem_size = 8; instruction.operand_count = 2; } OperandCase::Fw => { diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index 6f052c6..0df8cee 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -409,6 +409,9 @@ impl OperandSpec { fn is_memory(&self) -> bool { (*self as u8) & 0x80 != 0 } + fn is_masked(&self) -> bool { + (*self as u8) & 0x40 != 0 + } } /// an `avx512` merging mode. /// @@ -6445,8 +6448,15 @@ fn read_operands< instruction.mem_size = 4; } else if instruction.opcode == Opcode::RETF { instruction.mem_size = 6; + } else if instruction.opcode == Opcode::POPF { + instruction.mem_size = 4; + } else if instruction.opcode == Opcode::PUSHF { + instruction.mem_size = 4; + } else if instruction.opcode == Opcode::LEAVE { + instruction.mem_size = 4; + } else if instruction.opcode == Opcode::XLAT { + instruction.mem_size = 1; } - // TODO: leave? instruction.operands[0] = OperandSpec::Nothing; instruction.operand_count = 0; return Ok(()); @@ -6993,6 +7003,8 @@ fn read_operands< instruction.imm = read_num(words, 1)? as u32; instruction.operands[0] = OperandSpec::ImmInDispField; instruction.operands[1] = OperandSpec::ImmU8; + // because there is an implied push of the adjusted base pointer + instruction.mem_size = 4; instruction.operand_count = 2; } OperandCase::Fw => { diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs index 42a0b03..c11cf00 100644 --- a/src/real_mode/mod.rs +++ b/src/real_mode/mod.rs @@ -409,6 +409,9 @@ impl OperandSpec { fn is_memory(&self) -> bool { (*self as u8) & 0x80 != 0 } + fn is_masked(&self) -> bool { + (*self as u8) & 0x40 != 0 + } } /// an `avx512` merging mode. /// @@ -6482,8 +6485,15 @@ fn read_operands< instruction.mem_size = 2; } else if instruction.opcode == Opcode::RETF { instruction.mem_size = 4; + } else if instruction.opcode == Opcode::POPF { + instruction.mem_size = 2; + } else if instruction.opcode == Opcode::PUSHF { + instruction.mem_size = 2; + } else if instruction.opcode == Opcode::LEAVE { + instruction.mem_size = 2; + } else if instruction.opcode == Opcode::XLAT { + instruction.mem_size = 1; } - // TODO: leave? instruction.operands[0] = OperandSpec::Nothing; instruction.operand_count = 0; return Ok(()); @@ -7032,6 +7042,8 @@ fn read_operands< instruction.imm = read_num(words, 1)? as u32; instruction.operands[0] = OperandSpec::ImmInDispField; instruction.operands[1] = OperandSpec::ImmU8; + // because there is an implied push of the adjusted base pointer + instruction.mem_size = 2; instruction.operand_count = 2; } OperandCase::Fw => { -- cgit v1.1