From c9df7910c914d04644aee660d48de1245467f384 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 3 May 2020 13:52:39 -0700
Subject: that instruction is cwd, not cbd

---
 src/long_mode/display.rs      | 4 ++--
 src/long_mode/mod.rs          | 4 ++--
 src/protected_mode/display.rs | 4 ++--
 src/protected_mode/mod.rs     | 4 ++--
 4 files changed, 8 insertions(+), 8 deletions(-)

(limited to 'src')

diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs
index 3025c16..49d1600 100644
--- a/src/long_mode/display.rs
+++ b/src/long_mode/display.rs
@@ -643,7 +643,7 @@ impl fmt::Display for Opcode {
             &Opcode::CBW => write!(f, "cbw"),
             &Opcode::CWDE => write!(f, "cwde"),
             &Opcode::CDQE => write!(f, "cdqe"),
-            &Opcode::CBD => write!(f, "cbd"),
+            &Opcode::CWD => write!(f, "cwd"),
             &Opcode::CDQ => write!(f, "cdq"),
             &Opcode::CQO => write!(f, "cqo"),
             &Opcode::ANDN => write!(f, "andn"),
@@ -1665,7 +1665,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::CBW |
             Opcode::CWDE |
             Opcode::CDQE |
-            Opcode::CBD |
+            Opcode::CWD |
             Opcode::CDQ |
             Opcode::CQO |
             Opcode::MOVDDUP |
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index b5920c5..3319141 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -519,7 +519,7 @@ pub enum Opcode {
     CBW,
     CWDE,
     CDQE,
-    CBD,
+    CWD,
     CDQ,
     CQO,
     LODS,
@@ -5959,7 +5959,7 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter
         OperandCode::CVT_DA => {
             let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, instruction.prefixes);
             instruction.opcode = match opwidth {
-                2 => { Opcode::CBD },
+                2 => { Opcode::CWD },
                 4 => { Opcode::CDQ },
                 8 => { Opcode::CQO },
                 _ => { unreachable!("invalid operation width"); },
diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs
index a5624d6..d072991 100644
--- a/src/protected_mode/display.rs
+++ b/src/protected_mode/display.rs
@@ -630,7 +630,7 @@ impl fmt::Display for Opcode {
             &Opcode::CBW => write!(f, "cbw"),
             &Opcode::CWDE => write!(f, "cwde"),
             &Opcode::CDQE => write!(f, "cdqe"),
-            &Opcode::CBD => write!(f, "cbd"),
+            &Opcode::CWD => write!(f, "cwd"),
             &Opcode::CDQ => write!(f, "cdq"),
             &Opcode::CQO => write!(f, "cqo"),
             &Opcode::ANDN => write!(f, "andn"),
@@ -1652,7 +1652,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::CBW |
             Opcode::CWDE |
             Opcode::CDQE |
-            Opcode::CBD |
+            Opcode::CWD |
             Opcode::CDQ |
             Opcode::CQO |
             Opcode::MOVDDUP |
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 3370aaa..2a32a91 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -505,7 +505,7 @@ pub enum Opcode {
     CBW,
     CWDE,
     CDQE,
-    CBD,
+    CWD,
     CDQ,
     CQO,
     LODS,
@@ -5945,7 +5945,7 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter
         OperandCode::CVT_DA => {
             let opwidth = imm_width_from_prefixes(SizeCode::vd, instruction.prefixes);
             instruction.opcode = match opwidth {
-                2 => { Opcode::CBD },
+                2 => { Opcode::CWD },
                 4 => { Opcode::CDQ },
                 _ => { unreachable!("invalid operation width"); },
             }
-- 
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