From ff9760b94936de929777f9730ac1568ac26bf4d5 Mon Sep 17 00:00:00 2001 From: iximeow Date: Sun, 4 Jul 2021 14:23:45 -0700 Subject: handle vzeroupper/vzeroall, reject vzero* with nonzero vvvv --- src/long_mode/vex.rs | 12 +++++++++++- src/protected_mode/vex.rs | 12 +++++++++++- src/real_mode/vex.rs | 12 +++++++++++- 3 files changed, 33 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs index 5695b17..9649e72 100644 --- a/src/long_mode/vex.rs +++ b/src/long_mode/vex.rs @@ -439,6 +439,12 @@ fn read_vex_operands::Address, { + if instruction.opcode == Opcode::VZEROUPPER || instruction.opcode == Opcode::VZEROALL { + if instruction.regs[3].num != 0 { + instruction.opcode = Opcode::Invalid; + return Err(DecodeError::InvalidOperand); + } + } instruction.operand_count = 0; Ok(()) }, @@ -1541,7 +1547,11 @@ fn read_vex_instruction::Address, (Opcode::VZEROUPPER, VEXOperandCode::Nothing), + 0x77 => if L { + (Opcode::VZEROALL, VEXOperandCode::Nothing) + } else { + (Opcode::VZEROUPPER, VEXOperandCode::Nothing) + }, 0xAE => (Opcode::Invalid, if L { return Err(DecodeError::InvalidOpcode); } else { diff --git a/src/protected_mode/vex.rs b/src/protected_mode/vex.rs index 3550f77..54c9d23 100644 --- a/src/protected_mode/vex.rs +++ b/src/protected_mode/vex.rs @@ -440,6 +440,12 @@ fn read_vex_operands::Address, { + if instruction.opcode == Opcode::VZEROUPPER || instruction.opcode == Opcode::VZEROALL { + if instruction.regs[3].num != 0 { + instruction.opcode = Opcode::Invalid; + return Err(DecodeError::InvalidOperand); + } + } instruction.operand_count = 0; Ok(()) }, @@ -1470,7 +1476,11 @@ fn read_vex_instruction::Address, (Opcode::VZEROUPPER, VEXOperandCode::Nothing), + 0x77 => if L { + (Opcode::VZEROALL, VEXOperandCode::Nothing) + } else { + (Opcode::VZEROUPPER, VEXOperandCode::Nothing) + }, 0xAE => (Opcode::Invalid, if L { return Err(DecodeError::InvalidOpcode); } else { diff --git a/src/real_mode/vex.rs b/src/real_mode/vex.rs index 8e69032..56eb48f 100644 --- a/src/real_mode/vex.rs +++ b/src/real_mode/vex.rs @@ -440,6 +440,12 @@ fn read_vex_operands::Address, { + if instruction.opcode == Opcode::VZEROUPPER || instruction.opcode == Opcode::VZEROALL { + if instruction.regs[3].num != 0 { + instruction.opcode = Opcode::Invalid; + return Err(DecodeError::InvalidOperand); + } + } instruction.operand_count = 0; Ok(()) }, @@ -1470,7 +1476,11 @@ fn read_vex_instruction::Address, (Opcode::VZEROUPPER, VEXOperandCode::Nothing), + 0x77 => if L { + (Opcode::VZEROALL, VEXOperandCode::Nothing) + } else { + (Opcode::VZEROUPPER, VEXOperandCode::Nothing) + }, 0xAE => (Opcode::Invalid, if L { return Err(DecodeError::InvalidOpcode); } else { -- cgit v1.1