From a0fd5a24cb0aa0b697f680c451d928cefe8323b4 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Thu, 21 May 2020 23:09:39 -0700
Subject: add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions

also add builders to get decoders appropriate for specific
microarchitectures from intel and amd
* low-power architectures are not yet present
---
 test/long_mode/operand.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'test/long_mode/operand.rs')

diff --git a/test/long_mode/operand.rs b/test/long_mode/operand.rs
index 885c6d1..1250b8a 100644
--- a/test/long_mode/operand.rs
+++ b/test/long_mode/operand.rs
@@ -1,5 +1,5 @@
 use yaxpeax_arch::{Decoder, LengthedInstruction};
-use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode};
+use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode, Operand, RegSpec};
 
 #[test]
 fn register_widths() {
-- 
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