From a0fd5a24cb0aa0b697f680c451d928cefe8323b4 Mon Sep 17 00:00:00 2001 From: iximeow Date: Thu, 21 May 2020 23:09:39 -0700 Subject: add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present --- test/long_mode/mod.rs | 70 +++++++++++++++++++++++++++++++++++++++++++++++ test/long_mode/operand.rs | 2 +- 2 files changed, 71 insertions(+), 1 deletion(-) (limited to 'test/long_mode') diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs index 2fbe4fb..b37581e 100644 --- a/test/long_mode/mod.rs +++ b/test/long_mode/mod.rs @@ -1095,3 +1095,73 @@ fn prefixed_f30f() { test_display(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7"); test_display(&[0xf3, 0x4d, 0x0f, 0x16, 0xcf], "movshdup xmm9, xmm15"); } + +#[test] +fn test_adx() { + test_display(&[0x66, 0x0f, 0x38, 0xf6, 0xc1], "adcx eax, ecx"); + test_display(&[0x66, 0x0f, 0x38, 0xf6, 0x01], "adcx eax, [rcx]"); + test_display(&[0x66, 0x4f, 0x0f, 0x38, 0xf6, 0x01], "adcx r8, [r9]"); + test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0xc1], "adox eax, ecx"); + test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0x01], "adox eax, [rcx]"); + test_display(&[0xf3, 0x4f, 0x0f, 0x38, 0xf6, 0x01], "adox r8, [r9]"); +} + +#[test] +fn test_prefetchw() { + test_display(&[0x0f, 0x0d, 0x08], "prefetchw [rax]"); +} + +#[test] +fn test_lzcnt() { + test_display(&[0x66, 0xf3, 0x0f, 0xbd, 0xc1], "lzcnt ax, cx"); + test_display(&[0xf3, 0x0f, 0xbd, 0xc1], "lzcnt eax, ecx"); + test_display(&[0xf3, 0x48, 0x0f, 0xbd, 0xc1], "lzcnt rax, rcx"); +} + +#[test] +fn test_svm() { + test_display(&[0x0f, 0x01, 0xdf], "invlpga rax, ecx"); + test_display(&[0x0f, 0x01, 0xde], "skinit eax"); + test_display(&[0x0f, 0x01, 0xdd], "clgi"); + test_display(&[0x0f, 0x01, 0xdc], "stgi"); + test_display(&[0x0f, 0x01, 0xdb], "vmsave rax"); + test_display(&[0x0f, 0x01, 0xda], "vmload rax"); + test_display(&[0x0f, 0x01, 0xd9], "vmmcall"); + test_display(&[0x0f, 0x01, 0xd8], "vmrun rax"); +} + +#[test] +fn test_movbe() { + test_display(&[0x0f, 0x38, 0xf0, 0x06], "movbe eax, [rsi]"); + test_display(&[0x4f, 0x0f, 0x38, 0xf0, 0x06], "movbe r8, [r14]"); +} + +#[test] +fn test_tsx() { + test_display(&[0xc6, 0xf8, 0x10], "xabort 0x10"); + test_display(&[0xc7, 0xf8, 0x10, 0x12, 0x34, 0x56, 0x78], "xbegin 0x78563412"); + test_display(&[0x66, 0xc7, 0xf8, 0x10, 0x12, 0x34], "xbegin 0x3412"); + test_display(&[0x0f, 0x01, 0xd5], "xend"); + test_display(&[0x0f, 0x01, 0xd6], "xtest"); +} + +#[test] +fn test_rand() { + test_display(&[0x0f, 0xc7, 0xfd], "rdseed ebp"); + test_display(&[0x66, 0x0f, 0xc7, 0xfd], "rdseed bp"); + test_display(&[0x48, 0x0f, 0xc7, 0xfd], "rdseed rbp"); + test_display(&[0x0f, 0xc7, 0xf5], "rdrand ebp"); + test_display(&[0x66, 0x0f, 0xc7, 0xf5], "rdrand bp"); + test_display(&[0x48, 0x0f, 0xc7, 0xf5], "rdrand rbp"); +} + +#[test] +fn test_sha() { + test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, [rdx], 0x40"); + test_display(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, [rdx]"); + test_display(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, [rdx]"); + test_display(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, [rdx]"); + test_display(&[0x0f, 0x38, 0xcb, 0x12], "sha256rnds2 xmm2, [rdx]"); + test_display(&[0x0f, 0x38, 0xcc, 0x12], "sha256msg1 xmm2, [rdx]"); + test_display(&[0x0f, 0x38, 0xcd, 0x12], "sha256msg2 xmm2, [rdx]"); +} diff --git a/test/long_mode/operand.rs b/test/long_mode/operand.rs index 885c6d1..1250b8a 100644 --- a/test/long_mode/operand.rs +++ b/test/long_mode/operand.rs @@ -1,5 +1,5 @@ use yaxpeax_arch::{Decoder, LengthedInstruction}; -use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode}; +use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode, Operand, RegSpec}; #[test] fn register_widths() { -- cgit v1.1