From b52dd7a453e041ca79f0c440dcd657e0b9225828 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 5 Mar 2023 08:36:41 -0800
Subject: add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc`
 helpers

this request/suggestion comes from
[github](https://github.com/iximeow/yaxpeax-x86/issues/29)! thank you!
---
 test/protected_mode/mod.rs    |  1 +
 test/protected_mode/opcode.rs | 79 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 80 insertions(+)
 create mode 100644 test/protected_mode/opcode.rs

(limited to 'test/protected_mode')

diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs
index 93f4b8f..0270dcc 100644
--- a/test/protected_mode/mod.rs
+++ b/test/protected_mode/mod.rs
@@ -1,5 +1,6 @@
 mod regspec;
 mod operand;
+mod opcode;
 #[cfg(feature="fmt")]
 mod display;
 mod evex_generated;
diff --git a/test/protected_mode/opcode.rs b/test/protected_mode/opcode.rs
new file mode 100644
index 0000000..b6ab1d3
--- /dev/null
+++ b/test/protected_mode/opcode.rs
@@ -0,0 +1,79 @@
+use yaxpeax_x86::protected_mode::{ConditionCode, Opcode};
+
+#[test]
+fn conditional_instructions() {
+    const JCC: &'static [(Opcode, ConditionCode); 16] = &[
+        (Opcode::JO, ConditionCode::O),
+        (Opcode::JNO, ConditionCode::NO),
+        (Opcode::JB, ConditionCode::B),
+        (Opcode::JNB, ConditionCode::AE),
+        (Opcode::JZ, ConditionCode::Z),
+        (Opcode::JNZ, ConditionCode::NZ),
+        (Opcode::JA, ConditionCode::A),
+        (Opcode::JNA, ConditionCode::BE),
+        (Opcode::JS, ConditionCode::S),
+        (Opcode::JNS, ConditionCode::NS),
+        (Opcode::JP, ConditionCode::P),
+        (Opcode::JNP, ConditionCode::NP),
+        (Opcode::JL, ConditionCode::L),
+        (Opcode::JGE, ConditionCode::GE),
+        (Opcode::JG, ConditionCode::G),
+        (Opcode::JLE, ConditionCode::LE),
+    ];
+    for (opc, cond) in JCC.iter() {
+        assert!(opc.is_jcc());
+        assert!(!opc.is_setcc());
+        assert!(!opc.is_cmovcc());
+        assert_eq!(opc.condition(), Some(*cond));
+    }
+
+    const SETCC: &'static [(Opcode, ConditionCode); 16] = &[
+        (Opcode::SETO, ConditionCode::O),
+        (Opcode::SETNO, ConditionCode::NO),
+        (Opcode::SETB, ConditionCode::B),
+        (Opcode::SETAE, ConditionCode::AE),
+        (Opcode::SETZ, ConditionCode::Z),
+        (Opcode::SETNZ, ConditionCode::NZ),
+        (Opcode::SETA, ConditionCode::A),
+        (Opcode::SETBE, ConditionCode::BE),
+        (Opcode::SETS, ConditionCode::S),
+        (Opcode::SETNS, ConditionCode::NS),
+        (Opcode::SETP, ConditionCode::P),
+        (Opcode::SETNP, ConditionCode::NP),
+        (Opcode::SETL, ConditionCode::L),
+        (Opcode::SETGE, ConditionCode::GE),
+        (Opcode::SETG, ConditionCode::G),
+        (Opcode::SETLE, ConditionCode::LE),
+    ];
+    for (opc, cond) in SETCC.iter() {
+        assert!(!opc.is_jcc());
+        assert!(opc.is_setcc());
+        assert!(!opc.is_cmovcc());
+        assert_eq!(opc.condition(), Some(*cond));
+    }
+
+    const CMOVCC: &'static [(Opcode, ConditionCode); 16] = &[
+        (Opcode::CMOVO, ConditionCode::O),
+        (Opcode::CMOVNO, ConditionCode::NO),
+        (Opcode::CMOVB, ConditionCode::B),
+        (Opcode::CMOVNB, ConditionCode::AE),
+        (Opcode::CMOVZ, ConditionCode::Z),
+        (Opcode::CMOVNZ, ConditionCode::NZ),
+        (Opcode::CMOVA, ConditionCode::A),
+        (Opcode::CMOVNA, ConditionCode::BE),
+        (Opcode::CMOVS, ConditionCode::S),
+        (Opcode::CMOVNS, ConditionCode::NS),
+        (Opcode::CMOVP, ConditionCode::P),
+        (Opcode::CMOVNP, ConditionCode::NP),
+        (Opcode::CMOVL, ConditionCode::L),
+        (Opcode::CMOVGE, ConditionCode::GE),
+        (Opcode::CMOVG, ConditionCode::G),
+        (Opcode::CMOVLE, ConditionCode::LE),
+    ];
+    for (opc, cond) in CMOVCC.iter() {
+        assert!(!opc.is_jcc());
+        assert!(!opc.is_setcc());
+        assert!(opc.is_cmovcc());
+        assert_eq!(opc.condition(), Some(*cond));
+    }
+}
-- 
cgit v1.1