From 876fc7449cf862e7ffe788885fb7d4209ad2eb5d Mon Sep 17 00:00:00 2001 From: iximeow Date: Sun, 3 May 2020 13:54:02 -0700 Subject: add width() to ask width of an x86 operand this is largely wrong for memory operands, which require more invasive changes --- test/long_mode/mod.rs | 1 + test/long_mode/operand.rs | 17 +++++++++++++++++ test/protected_mode/mod.rs | 1 + test/protected_mode/operand.rs | 16 ++++++++++++++++ 4 files changed, 35 insertions(+) create mode 100644 test/long_mode/operand.rs create mode 100644 test/protected_mode/operand.rs (limited to 'test') diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs index addaae4..2fbe4fb 100644 --- a/test/long_mode/mod.rs +++ b/test/long_mode/mod.rs @@ -1,4 +1,5 @@ mod regspec; +mod operand; use std::fmt::Write; diff --git a/test/long_mode/operand.rs b/test/long_mode/operand.rs new file mode 100644 index 0000000..885c6d1 --- /dev/null +++ b/test/long_mode/operand.rs @@ -0,0 +1,17 @@ +use yaxpeax_arch::{Decoder, LengthedInstruction}; +use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode}; + +#[test] +fn register_widths() { + assert_eq!(Operand::Register(RegSpec::rsp()).width(), 8); + assert_eq!(Operand::Register(RegSpec::esp()).width(), 4); + assert_eq!(Operand::Register(RegSpec::sp()).width(), 2); + assert_eq!(Operand::Register(RegSpec::cl()).width(), 1); + assert_eq!(Operand::Register(RegSpec::ch()).width(), 1); + assert_eq!(Operand::Register(RegSpec::gs()).width(), 2); +} + +#[test] +fn memory_widths() { + assert_eq!(Operand::RegDeref(RegSpec::rsp()).width(), 8); +} diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs index 37a3b24..ab3cdc8 100644 --- a/test/protected_mode/mod.rs +++ b/test/protected_mode/mod.rs @@ -1,4 +1,5 @@ mod regspec; +mod operand; use std::fmt::Write; diff --git a/test/protected_mode/operand.rs b/test/protected_mode/operand.rs new file mode 100644 index 0000000..08a24be --- /dev/null +++ b/test/protected_mode/operand.rs @@ -0,0 +1,16 @@ +use yaxpeax_arch::{Decoder, LengthedInstruction}; +use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode}; + +#[test] +fn register_widths() { + assert_eq!(Operand::Register(RegSpec::esp()).width(), 4); + assert_eq!(Operand::Register(RegSpec::sp()).width(), 2); + assert_eq!(Operand::Register(RegSpec::cl()).width(), 1); + assert_eq!(Operand::Register(RegSpec::ch()).width(), 1); + assert_eq!(Operand::Register(RegSpec::gs()).width(), 2); +} + +#[test] +fn memory_widths() { + assert_eq!(Operand::RegDeref(RegSpec::rsp()).width(), 4); +} -- cgit v1.1