From d13d8ebfad98b3d547f455ec9d73dab98f0899c3 Mon Sep 17 00:00:00 2001
From: iximeow <me@iximeow.net>
Date: Sun, 19 Dec 2021 09:06:12 -0800
Subject: test that invalid RegSpec constructions panic as expected

in the process, fix 64-bit rex-byte limit, 32/16-bit mode mask reg limit
---
 test/long_mode/mod.rs      | 64 ++++++++++++++++++++++++++++++++++++++++++++++
 test/protected_mode/mod.rs | 52 +++++++++++++++++++++++++++++++++++++
 test/real_mode/mod.rs      | 52 +++++++++++++++++++++++++++++++++++++
 3 files changed, 168 insertions(+)

(limited to 'test')

diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index d23df49..0bef224 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -3397,3 +3397,67 @@ fn from_reports() {
     test_display(&[0x62, 0xf2, 0x6d, 0xac, 0x00, 0x59, 0xa7], "vpshufb ymm3{k4}{z}, ymm2, ymmword [rcx - 0xb20]");
     test_display(&[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2], "vcompresspd xmmword [rdx - 0x70]{k7}, xmm4");
 }
+
+mod reg_masks {
+    use yaxpeax_x86::long_mode::RegSpec;
+
+    #[test]
+    #[should_panic]
+    fn invalid_mask_reg_panics() {
+        RegSpec::mask(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_qword_reg_panics() {
+        RegSpec::q(16);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_dword_reg_panics() {
+        RegSpec::d(16);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_word_reg_panics() {
+        RegSpec::w(16);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_byte_reg_panics() {
+        RegSpec::b(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_rex_byte_reg_panics() {
+        RegSpec::rb(16);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_x87_reg_panics() {
+        RegSpec::st(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_xmm_reg_panics() {
+        RegSpec::xmm(32);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_ymm_reg_panics() {
+        RegSpec::ymm(32);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_zmm_reg_panics() {
+        RegSpec::zmm(32);
+    }
+}
diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs
index 1b0ca59..9f34019 100644
--- a/test/protected_mode/mod.rs
+++ b/test/protected_mode/mod.rs
@@ -3084,3 +3084,55 @@ fn from_reports() {
     test_display(&[0x62, 0xf2, 0x6d, 0xac, 0x00, 0x59, 0xa7], "vpshufb ymm3{k4}{z}, ymm2, ymmword [ecx - 0xb20]");
     test_display(&[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2], "vcompresspd xmmword [edx - 0x70]{k7}, xmm4");
 }
+
+mod reg_masks {
+    use yaxpeax_x86::protected_mode::RegSpec;
+
+    #[test]
+    #[should_panic]
+    fn invalid_mask_reg_panics() {
+        RegSpec::mask(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_dword_reg_panics() {
+        RegSpec::d(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_word_reg_panics() {
+        RegSpec::w(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_byte_reg_panics() {
+        RegSpec::b(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_x87_reg_panics() {
+        RegSpec::st(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_xmm_reg_panics() {
+        RegSpec::xmm(32);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_ymm_reg_panics() {
+        RegSpec::ymm(32);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_zmm_reg_panics() {
+        RegSpec::zmm(32);
+    }
+}
diff --git a/test/real_mode/mod.rs b/test/real_mode/mod.rs
index b2d6d8d..bf2ae8c 100644
--- a/test/real_mode/mod.rs
+++ b/test/real_mode/mod.rs
@@ -18369,3 +18369,55 @@ fn from_reports() {
     test_display(&[0x62, 0xf2, 0x6d, 0xac, 0x00, 0x59, 0xa7], "vpshufb ymm3{k4}{z}, ymm2, ymmword [bx + di - 0xb20]");
     test_display(&[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2], "vcompresspd xmmword [bp + si - 0x70]{k7}, xmm4");
 }
+
+mod reg_masks {
+    use yaxpeax_x86::real_mode::RegSpec;
+
+    #[test]
+    #[should_panic]
+    fn invalid_mask_reg_panics() {
+        RegSpec::mask(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_dword_reg_panics() {
+        RegSpec::d(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_word_reg_panics() {
+        RegSpec::w(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_byte_reg_panics() {
+        RegSpec::b(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_x87_reg_panics() {
+        RegSpec::st(8);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_xmm_reg_panics() {
+        RegSpec::xmm(32);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_ymm_reg_panics() {
+        RegSpec::ymm(32);
+    }
+
+    #[test]
+    #[should_panic]
+    fn invalid_zmm_reg_panics() {
+        RegSpec::zmm(32);
+    }
+}
-- 
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