diff options
author | iximeow <me@iximeow.net> | 2025-03-28 01:39:42 -0700 |
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committer | iximeow <me@iximeow.net> | 2025-03-28 01:39:42 -0700 |
commit | e5849e3fa4830c83825f2d2cf9ef62853012aea2 (patch) | |
tree | 89f1079fa488c17b3091748dbb4010e9236e5b39 /src/display.rs | |
parent | fe0a4395eb132e4696e6288e83517d9332e2fd1a (diff) |
0b1000..0b1100: DONE!
Diffstat (limited to 'src/display.rs')
-rw-r--r-- | src/display.rs | 87 |
1 files changed, 82 insertions, 5 deletions
diff --git a/src/display.rs b/src/display.rs index dbf4e44..ecd9a26 100644 --- a/src/display.rs +++ b/src/display.rs @@ -71,6 +71,15 @@ impl fmt::Display for Instruction { return write!(f, "{} = or({}, or({}, !{}))", self.dest.as_ref().unwrap(), self.sources[0], self.sources[1], self.sources[2]); } + Opcode::AddClb => { + return write!(f, "{} = add(clb({}), {})", self.dest.as_ref().unwrap(), + self.sources[0], self.sources[1]); + } + Opcode::SfInvsqrta => { + return write!(f, "{}, {} = {}({})", + self.dest.as_ref().unwrap(), self.alt_dest.as_ref().unwrap(), + self.opcode, self.sources[0]); + } _ => { unreachable!("TODO: should be exhaustive for opcodes with special display rules"); } @@ -404,6 +413,7 @@ impl fmt::Display for Opcode { Opcode::Asr => { f.write_str("asr") }, Opcode::Lsr => { f.write_str("lsr") }, Opcode::Asl => { f.write_str("asl") }, + Opcode::Lsl => { f.write_str("lsl") }, Opcode::Rol => { f.write_str("rol") }, Opcode::Vsathub => { f.write_str("vsathub") }, Opcode::Vsatwuh => { f.write_str("vsatwuh") }, @@ -428,12 +438,8 @@ impl fmt::Display for Opcode { Opcode::Interleave => { f.write_str("interleave") }, Opcode::Brev => { f.write_str("brev") }, - Opcode::ConvertDf2d => { f.write_str("convert_df2d") }, - Opcode::ConvertDf2ud => { f.write_str("convert_df2ud") }, - Opcode::ConvertUd2df => { f.write_str("convert_ud2df") }, - Opcode::ConvertD2df => { f.write_str("convert_d2df") }, - Opcode::Extractu => { f.write_str("extractu") }, + Opcode::Extract => { f.write_str("extract") }, Opcode::Insert => { f.write_str("insert") }, Opcode::TransferRegisterJump => { f.write_str("transferregisterjump") } @@ -507,8 +513,79 @@ impl fmt::Display for Opcode { Opcode::OrAndNot => { f.write_str("orandnot") }, Opcode::OrNot => { f.write_str("ornot") }, Opcode::OrOrNot => { f.write_str("orornot") }, + Opcode::AddClb => { f.write_str("addclb") }, Opcode::Any8 => { f.write_str("any8") }, Opcode::All8 => { f.write_str("all8") }, + Opcode::Valignb => { f.write_str("valignb") }, + Opcode::Vspliceb => { f.write_str("vspliceb") }, + Opcode::Vsxtbh => { f.write_str("vsxtbh") }, + Opcode::Vzxtbh => { f.write_str("vzxtbh") }, + Opcode::Vsxthw => { f.write_str("vsxthw") }, + Opcode::Vzxthw => { f.write_str("vzxthw") }, + Opcode::Vsplatb => { f.write_str("vsplatb") }, + Opcode::Vsplath => { f.write_str("vsplath") }, + Opcode::Vrcrotate => { f.write_str("vrcrotate") }, + Opcode::Vrmaxh => { f.write_str("vrmaxh") }, + Opcode::Vrmaxw => { f.write_str("vrmaxw") }, + Opcode::Vrminh => { f.write_str("vrminh") }, + Opcode::Vrminw => { f.write_str("vrminw") }, + Opcode::Vrmaxuh => { f.write_str("vrmaxuh") }, + Opcode::Vrmaxuw => { f.write_str("vrmaxuw") }, + Opcode::Vrminuh => { f.write_str("vrminuh") }, + Opcode::Vrminuw => { f.write_str("vrminuw") }, + Opcode::Vrcnegh => { f.write_str("vrcnegh") }, + Opcode::ConvertDf2D => { f.write_str("convert_df2d") }, + Opcode::ConvertDf2Ud => { f.write_str("convert_df2ud") }, + Opcode::ConvertUd2Df => { f.write_str("convert_ud2df") }, + Opcode::ConvertD2Df => { f.write_str("convert_d2df") }, + Opcode::ConvertD2Sf => { f.write_str("convert_d2sf") }, + Opcode::ConvertSf2Df => { f.write_str("convert_sf2df") }, + Opcode::ConvertDf2Sf => { f.write_str("convert_df2sf") }, + Opcode::ConvertUw2Sf => { f.write_str("convert_uw2sf") }, + Opcode::ConvertUw2Df => { f.write_str("convert_uw2df") }, + Opcode::ConvertUd2Sf => { f.write_str("convert_ud2sf") }, + Opcode::ConvertW2Sf => { f.write_str("convert_w2sf") }, + Opcode::ConvertW2Df => { f.write_str("convert_w2df") }, + Opcode::ConvertSf2Uw => { f.write_str("convert_sf2uw") }, + Opcode::ConvertSf2Ud => { f.write_str("convert_sf2ud") }, + Opcode::ConvertSf2W => { f.write_str("convert_sf2w") }, + Opcode::ConvertSf2D => { f.write_str("convert_sf2d") }, + Opcode::Mask => { f.write_str("mask") }, + Opcode::Setbit => { f.write_str("setbit") }, + Opcode::Clrbit => { f.write_str("clrbit") }, + Opcode::Tstbit => { f.write_str("tstbit") }, + Opcode::Togglebit => { f.write_str("togglebit") }, + Opcode::Bitsclr => { f.write_str("bitsclr") }, + Opcode::Sfclass => { f.write_str("sfclass") }, + Opcode::Tableidxb => { f.write_str("tableidxb") }, + Opcode::Tableidxh => { f.write_str("tableidxh") }, + Opcode::Tableidxw => { f.write_str("tableidxw") }, + Opcode::Tableidxd => { f.write_str("tableidxd") }, + Opcode::Vasrhub => { f.write_str("vasrhub") }, + Opcode::Vrndwh => { f.write_str("vrndwh") }, + Opcode::Vtrunohb => { f.write_str("vtrunohb") }, + Opcode::Vtrunehb => { f.write_str("vtrunehb") }, + Opcode::Normamt => { f.write_str("normamt") }, + Opcode::Popcount => { f.write_str("popcount") }, + Opcode::Sat => { f.write_str("sat") }, + Opcode::Satb => { f.write_str("satb") }, + Opcode::Sath => { f.write_str("sath") }, + Opcode::Satub => { f.write_str("satub") }, + Opcode::Satuh => { f.write_str("satuh") }, + Opcode::Round => { f.write_str("round") }, + Opcode::Cround => { f.write_str("cround") }, + Opcode::Bitsplit => { f.write_str("bitsplit") }, + Opcode::Clip => { f.write_str("clip") }, + Opcode::Vclip => { f.write_str("vclip") }, + Opcode::Clb => { f.write_str("clb") }, + Opcode::Cl0 => { f.write_str("cl0") }, + Opcode::Cl1 => { f.write_str("cl1") }, + Opcode::Ct0 => { f.write_str("ct0") }, + Opcode::Ct1 => { f.write_str("ct1") }, + Opcode::Vitpack => { f.write_str("vitpack") }, + Opcode::SfFixupr => { f.write_str("sffixupr") }, + Opcode::SfInvsqrta => { f.write_str("sfinvsqrta") }, + Opcode::Swiz => { f.write_str("swiz") }, } } } |