diff options
Diffstat (limited to 'notes')
| -rw-r--r-- | notes/todo | 121 |
1 files changed, 60 insertions, 61 deletions
@@ -377,67 +377,66 @@ A L I A S A L I A S A L I A S A L I A S A L I A S | Rd=zxtb(Rs) |0 1 1 0|1 0 1 1 1 1 1|1 - - s s| P P |0 - - - t t u u -|- - - d d| Pd=or(Ps,or(Pt,Pu)) - CR/slot 3 |0 1 1 0|1 1 0 0 0 0 1|- - - - -| P P |- - - - - - 0 0 0|- - - - -| barrier - SYSTEM/slot 0 |0 1 1 0|1 1 1 1 1 1 1|t t t t t| P P |0 s s s s s 0 1 0|d d d d d| Rd=movlen(Rs,Rtt) - LD/slot 0,1 - Solo -|0 1 1 1|0 0 0 0 0 0 0|s s s s s| P P |0 - - - - - - - -|d d d d d| Rd=aslh(Rs) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 0|s s s s s| P P |1 - 0 0 u u - - -|d d d d d| if (Pu) Rd=aslh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 0|s s s s s| P P |1 - 0 1 u u - - -|d d d d d| if (Pu.new) Rd=aslh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 0|s s s s s| P P |1 - 1 0 u u - - -|d d d d d| if (!Pu) Rd=aslh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 0|s s s s s| P P |1 - 1 1 u u - - -|d d d d d| if (!Pu.new) Rd=aslh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 1|s s s s s| P P |0 - - - - - - - -|d d d d d| Rd=asrh(Rs) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 1|s s s s s| P P |1 - 0 0 u u - - -|d d d d d| if (Pu) Rd=asrh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 1|s s s s s| P P |1 - 0 1 u u - - -|d d d d d| if (Pu.new) Rd=asrh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 1|s s s s s| P P |1 - 1 0 u u - - -|d d d d d| if (!Pu) Rd=asrh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 0 1|s s s s s| P P |1 - 1 1 u u - - -|d d d d d| if (!Pu.new) Rd=asrh(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 0 1 1|s s s s s| P P |0 - - - - - - - -|d d d d d| Rd=Rs - ALU32/slots 0 1 2 3 - TransferRegister -|0 1 1 1|0 0 0 0 1 0 0|s s s s s| P P |1 - 0 0 u u - - -|d d d d d| if (Pu) Rd=zxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 0 0|s s s s s| P P |1 - 0 1 u u - - -|d d d d d| if (Pu.new) Rd=zxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 0 0|s s s s s| P P |1 - 1 0 u u - - -|d d d d d| if (!Pu) Rd=zxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 0 0|s s s s s| P P |1 - 1 1 u u - - -|d d d d d| if (!Pu.new) Rd=zxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 0 1|s s s s s| P P |0 - - - - - - - -|d d d d d| Rd=sxtb(Rs) - ALU32/slots 0 1 2 3 - SignExtend -|0 1 1 1|0 0 0 0 1 0 1|s s s s s| P P |1 - 0 0 u u - - -|d d d d d| if (Pu) Rd=sxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 0 1|s s s s s| P P |1 - 0 1 u u - - -|d d d d d| if (Pu.new) Rd=sxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 0 1|s s s s s| P P |1 - 1 0 u u - - -|d d d d d| if (!Pu) Rd=sxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 0 1|s s s s s| P P |1 - 1 1 u u - - -|d d d d d| if (!Pu.new) Rd=sxtb(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 0|s s s s s| P P |0 - - - - - - - -|d d d d d| Rd=zxth(Rs) - ALU32/slots 0 1 2 3 - SignExtend -|0 1 1 1|0 0 0 0 1 1 0|s s s s s| P P |1 - 0 0 u u - - -|d d d d d| if (Pu) Rd=zxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 0|s s s s s| P P |1 - 0 1 u u - - -|d d d d d| if (Pu.new) Rd=zxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 0|s s s s s| P P |1 - 1 0 u u - - -|d d d d d| if (!Pu) Rd=zxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 0|s s s s s| P P |1 - 1 1 u u - - -|d d d d d| if (!Pu.new) Rd=zxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 1|s s s s s| P P |0 - - - - - - - -|d d d d d| Rd=sxth(Rs) - ALU32/slots 0 1 2 3 - SignExtend -|0 1 1 1|0 0 0 0 1 1 1|s s s s s| P P |1 - 0 0 u u - - -|d d d d d| if (Pu) Rd=sxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 1|s s s s s| P P |1 - 0 1 u u - - -|d d d d d| if (Pu.new) Rd=sxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 1|s s s s s| P P |1 - 1 0 u u - - -|d d d d d| if (!Pu) Rd=sxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 0 1 1 1|s s s s s| P P |1 - 1 1 u u - - -|d d d d d| if (!Pu.new) Rd=sxth(Rs) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 0 1 i i 1|x x x x x| P P |i i i i i i i i i|i i i i i| Rx.L=#u16 - ALU32/slots 0 1 2 3 - TransferImmediate -|0 1 1 1|0 0 1 0 i i 1|x x x x x| P P |i i i i i i i i i|i i i i i| Rx.H=#u16 - ALU32/slots 0 1 2 3 - TransferImmediate -|0 1 1 1|0 0 1 1 - 0 0|s s s s s| P P |1 i i i i i i i i|d d d d d| Rdd=combine(Rs,#s8) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|0 0 1 1 - 0 1|s s s s s| P P |1 i i i i i i i i|d d d d d| Rdd=combine(#s8,Rs) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|0 0 1 1 - 1 0|s s s s s| P P |1 i i i i i i i i|d d d d d| Rd=cmp.eq(Rs,#s8) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 1 1 - 1 1|s s s s s| P P |1 i i i i i i i i|d d d d d| Rd=!cmp.eq(Rs,#s8) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 0 1 1 0 u u|s s s s s| P P |0 i i i i i i i i|d d d d d| Rd=mux(Pu,Rs,#s8) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|0 0 1 1 1 u u|s s s s s| P P |0 i i i i i i i i|d d d d d| Rd=mux(Pu,#s8,Rs) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|0 1 0 0 - - -|s s s s s| P P |- t t t t t - u u|d d d d d| Rd=mux(Pu,Rs,Rt) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|0 1 0 0 0 u u|s s s s s| P P |0 i i i i i i i i|d d d d d| if (Pu) Rd=add(Rs,#s8) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 0 0 u u|s s s s s| P P |1 i i i i i i i i|d d d d d| if (Pu.new) Rd=add(Rs,#s8) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 0 1 u u|s s s s s| P P |0 i i i i i i i i|d d d d d| if (!Pu) Rd=add(Rs,#s8) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 0 1 u u|s s s s s| P P |1 i i i i i i i i|d d d d d| if (!Pu.new) Rd=add(Rs,#s8) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 1 0 0 i|s s s s s| P P |i i i i i i i i i|0 0 0 d d| Pd=cmp.eq(Rs,#s10) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 1 0 0 i|s s s s s| P P |i i i i i i i i i|1 0 0 d d| Pd=!cmp.eq(Rs,#s10) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 1 0 1 i|s s s s s| P P |i i i i i i i i i|0 0 0 d d| Pd=cmp.gt(Rs,#s10) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 1 0 1 i|s s s s s| P P |i i i i i i i i i|1 0 0 d d| Pd=!cmp.gt(Rs,#s10) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 1 1 0 0|s s s s s| P P |i i i i i i i i i|0 0 0 d d| Pd=cmp.gtu(Rs,#u9) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 0 1 1 0 0|s s s s s| P P |i i i i i i i i i|1 0 0 d d| Pd=!cmp.gtu(Rs,#u9) - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|0 1 1 0 0 0 i|s s s s s| P P |i i i i i i i i i|d d d d d| Rd=and(Rs,#s10) - ALU32/slots 0 1 2 3 -|0 1 1 1|0 1 1 0 0 1 i|s s s s s| P P |i i i i i i i i i|d d d d d| Rd=sub(#s10,Rs) - ALU32/slots 0 1 2 3 -|0 1 1 1|0 1 1 0 1 0 i|s s s s s| P P |i i i i i i i i i|d d d d d| Rd=or(Rs,#s10) - ALU32/slots 0 1 2 3 -|0 1 1 1|1 0 0 0 i i -|i i i i i| P P |i i i i i i i i i|d d d d d| Rd=#s16 - ALU32/slots 0 1 2 3 - TransferImmediate -|0 1 1 1|1 0 1 i i l l|l l l l l| P P |l i i i i i i i i|d d d d d| Rd=mux(Pu,#s8,#S8) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|1 1 0 0 0 l l|l l l l l| P P |l i i i i i i i i|d d d d d| Rdd=combine(#s8,#S8) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|1 1 0 0 1 - -|l l l l l| P P |l i i i i i i i i|d d d d d| Rdd=combine(#s8,#U6) - ALU32 PERM/slots 0 1 2 3 -|0 1 1 1|1 1 1 0 0 u u|0 i i i i| P P |0 i i i i i i i i|d d d d d| if (Pu) Rd=#s12 - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|1 1 1 0 0 u u|0 i i i i| P P |1 i i i i i i i i|d d d d d| if (Pu.new) Rd=#s12 - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|1 1 1 0 1 u u|0 i i i i| P P |0 i i i i i i i i|d d d d d| if (!Pu) Rd=#s12 - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|1 1 1 0 1 u u|0 i i i i| P P |1 i i i i i i i i|d d d d d| if (!Pu.new) Rd=#s12 - ALU32 PRED/slots 0 1 2 3 -|0 1 1 1|1 1 1 1 - - -|- - - - -| P P |- - - - - - - - -|- - - - -| nop - ALU32/slots 0 1 2 3 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + |1 0 0 0|0 0 0 0|0 0 0|s s s s s| P P |- - - - - -|1 0 0|d d d d d| Rdd=vsathub(Rss) - XTYPE PERM/slot 2,3 |1 0 0 0|0 0 0 0|0 0 0|s s s s s| P P |- - - - - -|1 0 1|d d d d d| Rdd=vsatwuh(Rss) - XTYPE PERM/slot 2,3 |1 0 0 0|0 0 0 0|0 0 0|s s s s s| P P |- - - - - -|1 1 0|d d d d d| Rdd=vsatwh(Rss) - XTYPE PERM/slot 2,3 |