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11 dayspredicated store was RegOffset when it should be RegOffsetInciximeow
and a few more extender tests
11 daysjust... decoded predicated loads wrong...iximeow
11 daysmore instruction extendersiximeow
11 daysinitial list of extendable instructions, fix memub/memuh decode errorsiximeow
11 daysinitial instruction extender support, more system instructionsiximeow
12 daysmore registers as lower case, pc-relative shown like every other archiximeow
14 daysllvm accepts lowercase register names so LETS GOOOOOiximeow
14 dayscontrol, gpr register names, readmeiximeow
2025-04-09system control register names, more cleanupiximeow
2025-04-08supervisor mode instructions, control register namesiximeow
2025-04-07wowowowow cargo test passesiximeow
2025-04-07it is done (not all system, duplex, extender tho)iximeow
2025-04-07sfrecipa, more test cases, more inst variantsiximeow
2025-04-07more test coverage, getting close..iximeow
2025-04-07more tests and cleanup; sub, instruction labels, sfmpyiximeow
additionally, AndNot should show its special assign mode if one is set. a few instructions have 64-bit register pairs that can be conjugated. vrmpywoh should have operands. :sat applied incompletely AndNot can have |=, &=, and ^= assign modes, not += had a sub with backwards operands
2025-04-06wretched architecture which does not know the light of g*diximeow
2025-04-06more pmpy, ignore shift_{left,right} with amt=0iximeow
2025-04-06gross hacks for AddAsl, fix AddMpyi decodingiximeow
2025-04-06more test coverage, gpr conjugatesiximeow
2025-04-06shift vs sat order in display, vxaddsubh/vxsubaddh/extractu/decbiniximeow
2025-04-06fix extractu/shuff{e,o}{b,h}, add many test cases, handle AddMpyiiximeow
2025-04-05theoretically all non-system instructions...iximeow
2025-03-291101* is all thats left...iximeow
2025-03-280b1000..0b1100: DONE!iximeow
2025-03-23shifts and MORE transcription errors :(iximeow
2025-03-23thats 0110... doneiximeow
2025-03-23more loop support, transcription errors, etciximeow
2025-03-22wow 1001... is done nowiximeow
2025-03-22more loads, fix wrong dest ops for some loads..iximeow
2025-03-22warnings-b-goneiximeow
2025-03-22more tests, support more loads/storesiximeow
2025-03-21assign-merge is recorded now, 0100.. is decodediximeow
2025-03-19moderate progress...iximeow
2024-12-23checkpointiximeow
2024-11-10some iclass 1100, 1010, 1001iximeow
2024-11-10encoding table typo fixes, incremental progressiximeow
2024-10-09severe transcription error: many memb were recorded as if they were memw by bitsiximeow
2024-10-08transcription erroriximeow
2024-10-08more progressiximeow
2024-10-08transcription erroriximeow
2024-10-06more support, docs about some weird instruction shapesiximeow
2024-10-05more ops, transcription errorsiximeow
2024-10-05thank you, warningsiximeow
2024-10-05broader support, maybe 1/8th through. also v73 manual does not list ↵iximeow
supervisor instructions...
2024-09-29different transcription erroriximeow
2024-09-29starting to look like a disassembleriximeow
2024-09-29more transcription erroriximeow
2024-09-28sketching things outiximeow
2024-09-28todo listiximeow
2024-09-28reordered, starting to work through itiximeow
generated by cgit v1.1 at 2025-04-23 23:34:19 +0000