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authoriximeow <me@iximeow.net>2020-02-03 00:27:22 -0800
committeriximeow <me@iximeow.net>2020-02-03 00:27:22 -0800
commit57a03d96ff5c73d35fcff7ed1b8385f5182a32ba (patch)
treec48926395857be4d339cb84bfe2c0c934b4016ca /src
parent301cec3455f72f6290717b83046778eb2c847b70 (diff)
a displacement size of 0 in RegDerefDisp20Abs is possible and correct
specifically when selecting a register pair, rather than a displacement.
Diffstat (limited to 'src')
-rw-r--r--src/lib.rs1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/lib.rs b/src/lib.rs
index 98c53c1..7225fe7 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -2122,6 +2122,7 @@ fn Operand_RegDerefDisp20Abs<T: Iterator<Item=u8>>(code: u8, inst: &mut Instruct
};
match imm_size {
+ 0 => {}
1 => {
inst.dispabs = bytes.next().ok_or(DecodeError::ExhaustedInput)? as u16;
inst.length += 1;