that instruction is cwd, not cbd

6 files changed, 11 insertions, 8 deletions

diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs
index 3025c16..49d1600 100644
--- a/src/long_mode/display.rs
+++ b/src/long_mode/display.rs
@@ -643,7 +643,7 @@ impl fmt::Display for Opcode {
             &Opcode::CBW => write!(f, "cbw"),
             &Opcode::CWDE => write!(f, "cwde"),
             &Opcode::CDQE => write!(f, "cdqe"),
-            &Opcode::CBD => write!(f, "cbd"),
+            &Opcode::CWD => write!(f, "cwd"),
             &Opcode::CDQ => write!(f, "cdq"),
             &Opcode::CQO => write!(f, "cqo"),
             &Opcode::ANDN => write!(f, "andn"),
@@ -1665,7 +1665,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::CBW |
             Opcode::CWDE |
             Opcode::CDQE |
-            Opcode::CBD |
+            Opcode::CWD |
             Opcode::CDQ |
             Opcode::CQO |
             Opcode::MOVDDUP |
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index b5920c5..3319141 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -519,7 +519,7 @@ pub enum Opcode {
     CBW,
     CWDE,
     CDQE,
-    CBD,
+    CWD,
     CDQ,
     CQO,
     LODS,
@@ -5959,7 +5959,7 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter
         OperandCode::CVT_DA => {
             let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, instruction.prefixes);
             instruction.opcode = match opwidth {
-                2 => { Opcode::CBD },
+                2 => { Opcode::CWD },
                 4 => { Opcode::CDQ },
                 8 => { Opcode::CQO },
                 _ => { unreachable!("invalid operation width"); },
diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs
index a5624d6..d072991 100644
--- a/src/protected_mode/display.rs
+++ b/src/protected_mode/display.rs
@@ -630,7 +630,7 @@ impl fmt::Display for Opcode {
             &Opcode::CBW => write!(f, "cbw"),
             &Opcode::CWDE => write!(f, "cwde"),
             &Opcode::CDQE => write!(f, "cdqe"),
-            &Opcode::CBD => write!(f, "cbd"),
+            &Opcode::CWD => write!(f, "cwd"),
             &Opcode::CDQ => write!(f, "cdq"),
             &Opcode::CQO => write!(f, "cqo"),
             &Opcode::ANDN => write!(f, "andn"),
@@ -1652,7 +1652,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::CBW |
             Opcode::CWDE |
             Opcode::CDQE |
-            Opcode::CBD |
+            Opcode::CWD |
             Opcode::CDQ |
             Opcode::CQO |
             Opcode::MOVDDUP |
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 3370aaa..2a32a91 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -505,7 +505,7 @@ pub enum Opcode {
     CBW,
     CWDE,
     CDQE,
-    CBD,
+    CWD,
     CDQ,
     CQO,
     LODS,
@@ -5945,7 +5945,7 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter
         OperandCode::CVT_DA => {
             let opwidth = imm_width_from_prefixes(SizeCode::vd, instruction.prefixes);
             instruction.opcode = match opwidth {
-                2 => { Opcode::CBD },
+                2 => { Opcode::CWD },
                 4 => { Opcode::CDQ },
                 _ => { unreachable!("invalid operation width"); },
             }
diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index ca8a557..addaae4 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -804,6 +804,8 @@ fn test_misc() {
     test_display(&[0xcd, 0xff], "int 0xff");
     test_display(&[0x9c], "pushf");
     test_display(&[0x48, 0x98], "cdqe");
+    test_display(&[0x98], "cwde");
+    test_display(&[0x66, 0x99], "cwd");
     test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop cs:[rax + rax * 1]");
     test_display(&[0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00], "nop [rax + rax * 1]");
     test_display(&[0x48, 0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12], "lea rsp, [rdi + rax * 8 + 0x12000020]");
diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs
index dd07159..37a3b24 100644
--- a/test/protected_mode/mod.rs
+++ b/test/protected_mode/mod.rs
@@ -748,6 +748,7 @@ fn test_misc() {
     test_display(&[0xcd, 0xff], "int 0xff");
     test_display(&[0x9c], "pushf");
     test_display(&[0x98], "cwde");
+    test_display(&[0x66, 0x99], "cwd");
     test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop cs:[eax + eax * 1]");
     test_display(&[0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00], "nop [eax + eax * 1]");
     test_display(&[0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12], "lea esp, [edi + eax * 8 + 0x12000020]");